Xtensa port, part 4: documentation changes

[Bob Wilson <bwilson at tensilica dot com>]

Changelog for part 4:

	* doc/invoke.texi: Add Xtensa options.
	* doc/md.texi: Add Xtensa machine constraints.
Index: gcc/doc/invoke.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/invoke.texi,v
retrieving revision 1.3.2.31
diff -c -3 -p -r1.3.2.31 invoke.texi
*** invoke.texi	2001/11/14 22:33:37	1.3.2.31
--- invoke.texi	2001/11/30 17:41:16
*************** in the following sections.
*** 586,591 ****
--- 586,608 ----
  -msmall-exec  -mno-small-exec  -mmvcle -mno-mvcle @gol
  -m64 -m31 -mdebug -mno-debug}
  
+ @emph{Xtensa Options}
+ -mbig-endian -mlittle-endian
+ -mdensity -mno-density
+ -mmac16 -mno-mac16
+ -mmul16 -mno-mul16
+ -mmul32 -mno-mul32
+ -mnsa -mno-nsa
+ -mminmax -mno-minmax
+ -msext -mno-sext
+ -mbooleans -mno-booleans
+ -mhard-float -msoft-float
+ -mfused-madd -mno-fused-madd
+ -mserialize-volatile -mno-serialize-volatile
+ -mtext-section-literals -mno-text-section-literals
+ -mtarget-align -mno-target-align
+ -mlongcalls -mno-longcalls
+ 
  @item Code Generation Options
  @xref{Code Gen Options,,Options for Code Generation Conventions}.
  @gccoptlist{
*************** that macro, which enables you to change 
*** 4974,4979 ****
--- 4991,4997 ----
  * IA-64 Options::
  * D30V Options::
  * S/390 and zSeries Options::
+ * Xtensa Options::
  @end menu
  
  @node M680x0 Options
*************** use a @code{mvc} loop instead.  This is 
*** 8941,8949 ****
  @opindex mno-debug
  Print (or do not print) additional debug information when compiling.
  The default is to not print debug information.
- 
  @end table
  
  
  @node Code Gen Options
  @section Options for Code Generation Conventions
--- 8959,9108 ----
  @opindex mno-debug
  Print (or do not print) additional debug information when compiling.
  The default is to not print debug information.
  @end table
  
+ @node Xtensa Options
+ @subsection Xtensa Options
+ @cindex Xtensa Options
+ 
+ The Xtensa architecture is designed to support many different
+ configurations.  The compiler's default options can be set to match a
+ particular Xtensa configuration by copying a configuration file into the
+ GCC sources when building GCC.  The @samp{-m} options below may be used
+ to override the default options.
+ 
+ @table @code
+ @item -mbig-endian
+ @itemx -mlittle-endian
+ Specify big-endian or little-endian byte ordering for the target Xtensa
+ processor.
+ 
+ @item -mdensity
+ @itemx -mno-density
+ Enable or disable use of the optional Xtensa code density instructions.
+ 
+ @item -mmac16
+ @itemx -mno-mac16
+ Enable or disable use of the Xtensa MAC16 option.  When enabled, GCC
+ will generate MAC16 instructions from standard C code, with the
+ limitation that it will use neither the MR register file nor any
+ instruction that operates on the MR registers.  When this option is
+ disabled, GCC will translate 16-bit multiply/accumulate operations to a
+ combination of core instructions and library calls, depending on whether
+ any other multiplier options are enabled.
+ 
+ @item -mmul16
+ @itemx -mno-mul16
+ Enable or disable use of the 16-bit integer multiplier option.  When
+ enabled, the compiler will generate 16-bit multiply instructions for
+ multiplications of 16 bits or smaller in standard C code.  When this
+ option is disabled, the compiler will either use 32-bit multiply or
+ MAC16 instructions if they are available or generate library calls to
+ perform the multiply operations using shifts and adds.
+ 
+ @item -mmul32
+ @itemx -mno-mul32
+ Enable or disable use of the 32-bit integer multiplier option.  When
+ enabled, the compiler will generate 32-bit multiply instructions for
+ multiplications of 32 bits or smaller in standard C code.  When this
+ option is disabled, the compiler will generate library calls to perform
+ the multiply operations using either shifts and adds or 16-bit multiply
+ instructions if they are available.
+ 
+ @item -mnsa
+ @itemx -mno-nsa
+ Enable or disable use of the optional normalization shift amount
+ (@code{NSA}) instructions to implement the built-in @samp{ffs} function.
+ 
+ @item -mminmax
+ @itemx -mno-minmax
+ Enable or disable use of the optional minimum and maximum value
+ instructions.
+ 
+ @item -msext
+ @itemx -mno-sext
+ Enable or disable use of the optional sign extend (@code{SEXT})
+ instruction.
+ 
+ @item -mbooleans
+ @itemx -mno-booleans
+ Enable or disable support for the boolean register file used by Xtensa
+ coprocessors.  This is not typically useful by itself but may be
+ required for other options that make use of the boolean registers (e.g.,
+ the floating-point option).
+ 
+ @item -mhard-float
+ @itemx -msoft-float
+ Enable or disable use of the floating-point option.  When enabled, GCC
+ generates floating-point instructions for 32-bit @code{float}
+ operations.  When this option is disabled, GCC generates library calls
+ to emulate 32-bit floating-point operations using integer instructions.
+ Regardless of this option, 64-bit @code{double} operations are always
+ emulated with calls to library functions.
+ 
+ @item -mfused-madd
+ @itemx -mno-fused-madd
+ Enable or disable use of fused multiply/add and multiply/subtract
+ instructions in the floating-point option.  This has no effect if the
+ floating-point option is not also enabled.  Disabling fused multiply/add
+ and multiply/subtract instructions forces the compiler to use separate
+ instructions for the multiply and add/subtract operations.  This may be
+ desirable in some cases where strict IEEE 754-compliant results are
+ required: the fused multiply add/subtract instructions do not round the
+ intermediate result, thereby producing results with @emph{more} bits of
+ precision than specified by the IEEE standard.  Disabling fused multiply
+ add/subtract instructions also ensures that the program output is not
+ sensitive to the compiler's ability to combine multiply and add/subtract
+ operations.
+ 
+ @item -mserialize-volatile
+ @itemx -mno-serialize-volatile
+ When this option is enabled, GCC inserts @code{MEMW} instructions before
+ @code{volatile} memory references to guarantee sequential consistency.
+ The default is @samp{-mserialize-@-volatile}.  Use
+ @samp{-mno-@-serialize-@-volatile} to omit the @code{MEMW} instructions.
+ 
+ @item -mtext-section-literals
+ @itemx -mno-text-section-literals
+ Control the treatment of literal pools.  The default is
+ @samp{--no-@-text-@-section-@-literals}, which places literals in a
+ separate section in the output file.  This allows the literal pool to be
+ placed in a data RAM/ROM, and it also allows the linker to combine literal
+ pools from separate object files to remove redundant literals and
+ improve code size.  With @samp{--text-@-section-@-literals}, the
+ literals are interspersed in the text section in order to keep them as
+ close as possible to their references.  This may be necessary for large
+ assembly files.
+ 
+ @item -mtarget-align
+ @itemx -mno-target-align
+ When this option is enabled, GCC instructs the assembler to
+ automatically align instructions to reduce branch penalties at the
+ expense of some code density.  The assembler attempts to widen density
+ instructions to align branch targets and the instructions following call
+ instructions.  If there are not enough preceding safe density
+ instructions to align a target, no widening will be performed.  The
+ default is @samp{-mtarget-@-align}.  These options do not affect the
+ treatment of auto-aligned instructions like @code{LOOP}, which the
+ assembler will always align, either by widening density instructions or
+ by inserting no-op instructions.
+ 
+ @item -mlongcalls
+ @itemx -mno-longcalls
+ When this option is enabled, GCC instructs the assembler to translate
+ direct calls to indirect calls unless it can determine that the target
+ of a direct call is in the range allowed by the call instruction.  This
+ translation typically occurs for calls to functions in other source
+ files.  Specifically, the assembler translates a direct @code{CALL}
+ instruction into an @code{L32R} followed by a @code{CALLX} instruction.
+ The default is @samp{-mno-@-longcalls}.  This option should be used in
+ programs where the call target can potentially be out of range.  This
+ option is implemented in the assembler, not the compiler, so the
+ assembly code generated by GCC will still show direct call
+ instructions---look at the disassembled object code to see the actual
+ instructions.  Note that the assembler will use an indirect call for
+ every cross-file call, not just those that really will be out of range.
+ @end table
  
  @node Code Gen Options
  @section Options for Code Generation Conventions
Index: gcc/doc/md.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/md.texi,v
retrieving revision 1.1.2.12
diff -c -3 -p -r1.1.2.12 md.texi
*** md.texi	2001/10/09 23:14:18	1.1.2.12
--- md.texi	2001/11/30 17:41:20
*************** Symbolic constant suitable for use with 
*** 1948,1953 ****
--- 1948,1978 ----
  
  @end table
  
+ @item Xtensa---@file{xtensa.h}
+ @table @code
+ @item a
+ General-purpose 32-bit register
+ 
+ @item b
+ One-bit boolean register
+ 
+ @item A
+ MAC16 40-bit accumulator register
+ 
+ @item I
+ Signed 12-bit integer constant, for use in MOVI instructions
+ 
+ @item J
+ Signed 8-bit integer constant, for use in ADDI instructions
+ 
+ @item K
+ Integer constant valid for BccI instructions
+ 
+ @item L
+ Unsigned constant valid for BccUI instructions
+ 
+ @end table
+ 
  @end table
  
  @ifset INTERNALS