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[RFA:] genextract.c: Set ro_loc for peepholes (CRIS build ICE).
- From: Hans-Peter Nilsson <hans-peter dot nilsson at axis dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Tue, 20 Nov 2001 23:22:01 +0100
- Subject: [RFA:] genextract.c: Set ro_loc for peepholes (CRIS build ICE).
In a recent change (on the 14:th) to cleanup_subreg_operands,
called just after an insn's operands are extracted, it now
assumes that recog_data.operand_loc is set for all extracted
operands. However, that's not true for peepholes; the original
extract-time define_peepholes that cris.md still has.
This breaks for example cris-axis-elf builds. There's an ICE
building libgcc/./_divsi3.o because recog_data.operand_loc for a
peephole operand is dereferenced. For peepholes,
recog_data.operand_loc are unset for all operands, but by
default zero-initialized thanks to a thoughtful change by RTH
<URL:http://gcc.gnu.org/ml/gcc-patches/1999-02n/msg00755.html>):
In file included from _divsi3.c:2:
/yaddayaddayadda/gcc/config/cris/arit.c: In function `__Div':
/yaddayaddayadda/gcc/config/cris/arit.c:229: Internal error: Segmentation fault
For those interested, a test-case is for a limited time
available at <URL:ftp://ftp.axis.se/pub/users/hp/gcc/_divsi3.i>.
Run it through cc1 with -fpreprocessed -O2.
I think the assumption that recog_data.operand_loc is set for
define_peephole operands as well as define_insn operands is
reasonable. It happens for all "normal" (define_insn) operands
and an exception for peepholes does not seem useful. Note that
the parenthesized assignment-dereference-then-assignment code is
what the define_insn case does. (Read that as: if there's a
beautification request in reply to this patch, it should IMHO be
a separate change.)
This change takes cris-axis-elf a bit further, to the next
(unrelated) ICE. Film at 11. Bootstrapped and checked with no
regressions on i686-pc-linux-gnu, built and checked on (deep
breath here) mmix-knuth-mmixware+mmixware-sim,
h8300-hitachi-hms+h8300-sim, i960-unknown-coff+i960-sim,
m32r-unknown-elf+m32r-sim, mn10300-unknown-elf+mn10300-sim,
powerpc-unknown-eabisim+powerpc-sim. Note that arm-elf and
mips-elf are broken at the moment; builds as per
<URL:http://gcc.gnu.org/simtest-howto.html> get ICEd.
Ok to commit?
* genextract.c (main): Set ro_loc for peepholes.
Index: genextract.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/genextract.c,v
retrieving revision 1.47
diff -p -c -r1.47 genextract.c
*** genextract.c 2001/11/14 20:17:06 1.47
--- genextract.c 2001/11/20 03:03:16
*************** from the machine description file `md'.
*** 434,442 ****
/* The vector in the insn says how many operands it has.
And all it contains are operands. In fact, the vector was
! created just for the sake of this function. */
printf (" for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)\n");
! printf (" ro[i] = XVECEXP (pat, 0, i);\n");
printf (" break;\n\n");
}
--- 434,444 ----
/* The vector in the insn says how many operands it has.
And all it contains are operands. In fact, the vector was
! created just for the sake of this function. We need to set the
! location of the operands for sake of simplifications after
! extraction, like eliminating subregs. */
printf (" for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)\n");
! printf (" ro[i] = *(ro_loc[i] = &XVECEXP (pat, 0, i));\n");
printf (" break;\n\n");
}
brgds, H-P