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PATCH: Fix AltiVec register class bitmaps
- From: Stan Shebs <shebs at apple dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Fri, 16 Nov 2001 17:13:11 -0800
- Subject: PATCH: Fix AltiVec register class bitmaps
While dealing with assorted reload failures in our AltiVec example
code (which uses the Motorola extensions, so not of direct interest
here), I had occasion to count bits in REG_CLASS_CONTENTS, and
found some mistakes. They're fairly obvious, but I'd like to get
an OK before committing anyhow. Bootstraps on powerpc-apple-darwin.
Stan
2001-11-16 Stan Shebs <shebs@apple.com>
* config/rs6000/rs6000.h (REG_CLASS_CONTENTS): Fix the
AltiVec-related bitfields.
Index: config/rs6000/rs6000.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.h,v
retrieving revision 1.137
diff -c -3 -p -r1.137 rs6000.h
*** rs6000.h 2001/11/15 21:06:51 1.137
--- rs6000.h 2001/11/17 00:09:32
*************** enum reg_class
*** 1055,1062 ****
{ 0xfffffffe, 0x00000000, 0x00000008, 0x00000000 }, /* BASE_REGS */ \
{ 0xffffffff, 0x00000000, 0x00000008, 0x00000000 }, /* GENERAL_REGS */ \
{ 0x00000000, 0xffffffff, 0x00000000, 0x00000000 }, /* FLOAT_REGS */ \
! { 0x00000000, 0x00000000, 0xffffe000, 0x0001ffff }, /* ALTIVEC_REGS */ \
! { 0x00000000, 0x00000000, 0x00000000, 0x00020000 }, /* VRSAVE_REGS */
\
{ 0xffffffff, 0xffffffff, 0x00000008, 0x00000000 }, /* NON_SPECIAL_REGS */ \
{ 0x00000000, 0x00000000, 0x00000001, 0x00000000 }, /* MQ_REGS */ \
{ 0x00000000, 0x00000000, 0x00000002, 0x00000000 }, /* LINK_REGS */ \
--- 1055,1062 ----
{ 0xfffffffe, 0x00000000, 0x00000008, 0x00000000 }, /* BASE_REGS */ \
{ 0xffffffff, 0x00000000, 0x00000008, 0x00000000 }, /* GENERAL_REGS */ \
{ 0x00000000, 0xffffffff, 0x00000000, 0x00000000 }, /* FLOAT_REGS */ \
! { 0x00000000, 0x00000000, 0xffffe000, 0x00001fff }, /* ALTIVEC_REGS */ \
! { 0x00000000, 0x00000000, 0x00000000, 0x00002000 }, /* VRSAVE_REGS */
\
{ 0xffffffff, 0xffffffff, 0x00000008, 0x00000000 }, /* NON_SPECIAL_REGS */ \
{ 0x00000000, 0x00000000, 0x00000001, 0x00000000 }, /* MQ_REGS */ \
{ 0x00000000, 0x00000000, 0x00000002, 0x00000000 }, /* LINK_REGS */ \
*************** enum reg_class
*** 1066,1074 ****
{ 0xffffffff, 0x00000000, 0x0000000f, 0x00000000 }, /* SPEC_OR_GEN_REGS */ \
{ 0x00000000, 0x00000000, 0x00000010, 0x00000000 }, /* CR0_REGS */ \
{ 0x00000000, 0x00000000, 0x00000ff0, 0x00000000 }, /* CR_REGS */ \
! { 0xffffffff, 0x00000000, 0x0000ffff, 0x00000000 }, /* NON_FLOAT_REGS */ \
! { 0x00000000, 0x00000000, 0x00010000, 0x00000000 }, /* XER_REGS */ \
! { 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff } /* ALL_REGS */ \
}
/* The same information, inverted:
--- 1066,1074 ----
{ 0xffffffff, 0x00000000, 0x0000000f, 0x00000000 }, /* SPEC_OR_GEN_REGS */ \
{ 0x00000000, 0x00000000, 0x00000010, 0x00000000 }, /* CR0_REGS */ \
{ 0x00000000, 0x00000000, 0x00000ff0, 0x00000000 }, /* CR_REGS */ \
! { 0xffffffff, 0x00000000, 0x0000efff, 0x00000000 }, /* NON_FLOAT_REGS */ \
! { 0x00000000, 0x00000000, 0x00001000, 0x00000000 }, /* XER_REGS */ \
! { 0xffffffff, 0xffffffff, 0xffffffff, 0x00003fff } /* ALL_REGS */ \
}
/* The same information, inverted: