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Re: altivec patches
- To: Dale Johannesen <dalej at apple dot com>
- Subject: Re: altivec patches
- From: Aldy Hernandez <aldyh at redhat dot com>
- Date: 05 Nov 2001 22:49:36 -0500
- Cc: gcc patches <gcc-patches at gcc dot gnu dot org>, Geoff Keating <geoffk at cygnus dot com>
- References: <374D0C66-D239-11D5-AEDD-003065C86F94@apple.com>
> I'd really like to see vrsave in the enums and register macros
> (not necessarily the code). I dislike making a major change to
> an area if we know it's going to change again shortly.
done
> > + : ALTIVEC_VECTOR_MODE (MODE) ? ALTIVEC_REGNO_P (REGNO) \
> > + : ALTIVEC_REGNO_P (REGNO) ? ALTIVEC_VECTOR_MODE (MODE) \
> > : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \
> > : XER_REGNO_P (REGNO) ? (MODE) == PSImode \
> > : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \
>
> I don't think you want the first changed line here.
fixed
> > : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \
> > : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \
> > + : (CLASS1) == ALTIVEC_REGS && (CLASS2) != ALTIVEC_REGS ? 20 \
> > : (((CLASS1) == SPECIAL_REGS || (CLASS1) == MQ_REGS \
> > || (CLASS1) == LINK_REGS || (CLASS1) == CTR_REGS \
> > || (CLASS1) == LINK_OR_CTR_REGS) \
>
> And here you need
> : (CLASS1) != ALTIVEC_REGS && (CLASS2) == ALTIVEC_REGS ? 20
> analogous to the FLOAT case.
whoops. done.
> > + && ! ALTIVEC_VECTOR_MODE (MODE) \
> > && (((MODE) != DFmode && (MODE) != DImode) \
> > || (TARGET_32BIT \
> > ? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4) \
>
> That could be
> && ( ! ALTIVEC_VECTOR_MODE (MODE) || INTVAL (X) == 0)
> for better codegen. It's not wrong as is, though.
done
thanks for your corrections. hopefully we'll only need one more
iteration through this.
aldy