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[patch] VALID_SSE_REG_MODE fixup
- To: gcc-patches at gcc dot gnu dot org
- Subject: [patch] VALID_SSE_REG_MODE fixup
- From: Daniel Jungmann <D-S-J at web dot de>
- Date: Tue, 23 Oct 2001 17:03:04 +0200
Hi!
If SSE2 is available, XMM regs can hold 2 doubles (V2DFmode) and the
integer vectors are 128bit wide. The patch would fix this.
*** i386.h.old Tue Oct 23 02:02:00 2001
--- i386.h Tue Oct 23 16:53:10 2001
*************** extern int ix86_arch;
*** 931,937 ****
#define VALID_SSE_REG_MODE(MODE) \
((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \
|| (MODE) == SFmode \
! || (TARGET_SSE2 && ((MODE) == DFmode || VALID_MMX_REG_MODE (MODE))))
#define VALID_MMX_REG_MODE_3DNOW(MODE) \
((MODE) == V2SFmode || (MODE) == SFmode)
--- 931,938 ----
#define VALID_SSE_REG_MODE(MODE) \
((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \
|| (MODE) == SFmode \
! || (TARGET_SSE2 && ((MODE) == DFmode || (MODE) == V2DFmode \
! || (MODE) == V2DImode || (MODE) == V16QImode || (MODE) == V8HImode)))
#define VALID_MMX_REG_MODE_3DNOW(MODE) \
((MODE) == V2SFmode || (MODE) == SFmode)