alpha gprel optimizations

[Richard Henderson <rth at twiddle dot net>]

This is part 1 of an N step process to avoid the use of assembler
macros in the Alpha backend, as well as generate more efficient
relocations when possible.

The use of assembler macros is not wide-spread.  They only happen
in address loads, calls, and gp reloads.  At the time the alpha
port was written these macros were the _only_ way to perform these
operations.  Sometime in the DU 4.0 series, support for explicit
relocations was added to the DEC assembler.  Support in GAS was
added a while back, but was broken until a week ago.

The following adds an experimental switch -mexplicit-relocs, to
use this new assembler syntax.  It has been tested only against
ELF, as I have no convenient access to Tru64 any more.

This patch does two things.  First, expand lda, ldgp, and jsr macros
to the constituant instructions so that we can do .set nomacro so 
that the assembler will bitch when we feed it illegal instructions.

Second, access local symbols via gp-relative displacements.  Previously,
all addresses were always loaded from memory from the GOT, which meant
a memory load, which is minimum 3 cycles latency for the ideal case of
hitting the L1 cache.  Now we generate a ldah+lda pair, which is all
arithmetic, so is a constant 2 cycle latency to get the address.  Better,
the low part can be merged with load/store instructions, so some cases
reduce to 1 cycle latency.  There is some code expansion associated with
this -- about 162k for cc1 -- but the got is also reduced by 58k.  I
may be able to reduce this code expansion some later.

No benchmark numbers yet.


r~


	* config/alpha/alpha.c (alpha_next_sequence_number): New.
	(alpha_this_literal_sequence_number): New.
	(alpha_this_gpdisp_sequence_number): New.
	(some_operand, input_operand): Add HIGH.
	(local_symbolic_operand): New.
	(alpha_encode_section_info): New.
	(alpha_legitimate_address_p): Allow LO_SUM.
	(alpha_legitimize_address): Generate HIGH+LO_SUM.
	(alpha_expand_mov): Likewise.
	(secondary_reload_class): Check memory_operand not general_operand
	for FP_REGS test.
	(alpha_expand_unaligned_load): Force LO_SUM addresses into a register.
	(alpha_expand_unaligned_store): Likewise.
	(alpha_expand_unaligned_load_words): Likewise.
	(alpha_expand_unaligned_store_words): Likewise.
	(alpha_expand_block_clear): Likewise.
	(print_operand): Handle %#, %*, %H.
	(print_operand_address): Handle LO_SUM.
	(find_lo_sum): New.
	(alpha_does_function_need_gp): Use it.
	(alpha_expand_block_move): Fix signed compare warnings.
	(alpha_sa_mask, alpha_align_insns): Likewise.
	* config/alpha/alpha-protos.h: Update.
	* config/alpha/alpha.h (TARGET_EXPLICIT_RELOCS): New.
	(MASK_EXPLICIT_RELOCS): New.
	(TARGET_SWITCHES): Add -mexplicit-relocs.
	(EXTRA_CONSTRAINT): Add 'T'.
	(PREFERRED_RELOAD_CLASS): HIGH goes in GENERAL_REGS.
	(ASM_APP_ON, ASM_APP_OFF): Turn on and off asm macro expansion.
	(ENCODE_SECTION_INFO): Out line.
	(REDO_SECTION_INFO_P): New.
	(STRIP_NAME_ENCODING): New.
	(ASM_OUTPUT_LABELREF): New.
	(PRINT_OPERAND_PUNCT_VALID_P): Add #, *.
	(PREDICATE_CODES): Update.
	* config/alpha/alpha.md (divmodsi_internal_er, divmoddi_internal_er,
	call_osf_1_er_noreturn, call_osf_1_er, movdi_er_low, movdi_er_nofix,
	movdi_er_fix, prologue_ldgp_1_er, builtin_setjmp_receiver_sub_label_er,
	builtin_setjmp_receiver_er, exception_receiver_1_er,
	call_value_osf_1_er): New patterns.
	(sibcall_osf_1, sibcall_value_osf_1): Remove register alternative.
	(movqi, movhi, movsi): Add explicit $31 base register to lda.
	* config/alpha/elf.h (ASM_FILE_START): Set nomacro if explicit relocs.
	(FINAL_PRESCAN_INSN): New.

z.gz