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ia64 non-scheduling stop bit buglet


First seen with obvious atrocities such as

        br .L11
.L7:
        ;;
        addl r8 = 5, r0
        br .L11

but when reviewing other code changes we find niceities such as

@@ -7259,10 +6419,10 @@ <yyparse_1>:
             nop.i 0x0;;
 [MBB] (p07) addl r14=#,r1
       (p07) br.cond.dpnt.few <yyparse_1+#>
-            br.few <yyparse_1+#>
-[MMI]       ld8 r15=[r38];;
-            adds r14=-16,r49
-            nop.i 0x0;;
+            br.few <yyparse_1+#>;;
+[MFI]       ld8 r15=[r38]
+            nop.f 0x0
+            adds r14=-16,r49;;
 [MII]       st8 [r14]=r15
             addl r15=#,r1
             addl r14=#,r1;;

where we had a false dependancy on r14 beyond the unconditional branch.

Incidentally, the stop bit before barrier thing isn't strictly needed,
but it doesn't affect execution at all, and I think it looks tidier.


r~


        * config/ia64/ia64.c (emit_all_insn_group_barriers): Flush state
        at barrier insns.  Emit stop bits before barriers.

Index: config/ia64/ia64.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ia64/ia64.c,v
retrieving revision 1.116
diff -c -p -d -r1.116 ia64.c
*** ia64.c	2001/08/21 08:50:36	1.116
--- ia64.c	2001/08/22 08:11:26
*************** emit_all_insn_group_barriers (dump, insn
*** 4811,4823 ****
  
    for (insn = insns; insn; insn = NEXT_INSN (insn))
      {
!       if (GET_CODE (insn) == INSN
! 	       && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE
! 	       && XINT (PATTERN (insn), 1) == 2)
! 	init_insn_group_barriers ();
        else if (INSN_P (insn))
  	{
! 	  if (group_barrier_needed_p (insn))
  	    {
  	      emit_insn_before (gen_insn_group_barrier (GEN_INT (3)), insn);
  	      init_insn_group_barriers ();
--- 4811,4835 ----
  
    for (insn = insns; insn; insn = NEXT_INSN (insn))
      {
!       if (GET_CODE (insn) == BARRIER)
! 	{
! 	  rtx last = prev_active_insn (insn);
! 
! 	  if (! last)
! 	    continue;
! 	  if (GET_CODE (last) == JUMP_INSN
! 	      && GET_CODE (PATTERN (last)) == ADDR_DIFF_VEC)
! 	    last = prev_active_insn (last);
! 	  if (recog_memoized (last) != CODE_FOR_insn_group_barrier)
! 	    emit_insn_after (gen_insn_group_barrier (GEN_INT (3)), last);
! 
! 	  init_insn_group_barriers ();
! 	}
        else if (INSN_P (insn))
  	{
! 	  if (recog_memoized (insn) == CODE_FOR_insn_group_barrier)
! 	    init_insn_group_barriers ();
! 	  else if (group_barrier_needed_p (insn))
  	    {
  	      emit_insn_before (gen_insn_group_barrier (GEN_INT (3)), insn);
  	      init_insn_group_barriers ();


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