This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: c/3752: gcc 3.0: __builtin_constant_p(ptr==ptr), regression
- To: Kevin Ryde <user42 at zip dot com dot au>, gcc-gnats at gcc dot gnu dot org, gcc-patches at gcc dot gnu dot org
- Subject: Re: c/3752: gcc 3.0: __builtin_constant_p(ptr==ptr), regression
- From: Richard Henderson <rth at redhat dot com>
- Date: Mon, 23 Jul 2001 14:24:19 -0700
- References: <87y9pjl29j.fsf@zip.com.au> <20010722225854.E13946@redhat.com>
On Sun, Jul 22, 2001 at 10:58:54PM -0700, Richard Henderson wrote:
> I guess this worked before by having CSE simplify the code appropriately.
> If so, this means we've got a CSE regression somewhere too. I guess I'll
> look for that...
CSE isn't very good at simplifying
(set (reg:SI X) (const_int 0))
[...]
(set (strict_low_part (subreg:QI (reg:SI X) 0))
(eq:QI ...))
It's probably best if we avoid that construct early on,
and make that sort of transformation later if we can.
Tested on i686 linux; applied mainline and branch.
r~
* config/i386/i386.c (ix86_expand_setcc): Don't use method 0
before CSE.
* config/i386/i386.md: New setcc+movzbl peephole2.
Index: i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.288
diff -c -p -d -r1.288 i386.c
*** i386.c 2001/07/22 21:42:35 1.288
--- i386.c 2001/07/23 21:13:21
*************** ix86_expand_setcc (code, dest)
*** 6357,6365 ****
emit subreg setcc, zero extend.
2 -- destination is in QImode:
emit setcc only.
- */
! type = 0;
if (GET_MODE (dest) == QImode)
type = 2;
--- 6357,6368 ----
emit subreg setcc, zero extend.
2 -- destination is in QImode:
emit setcc only.
! We don't use mode 0 early in compilation because it confuses CSE.
! There are peepholes to turn mode 1 into mode 0 if things work out
! nicely after reload. */
!
! type = cse_not_expected ? 0 : 1;
if (GET_MODE (dest) == QImode)
type = 2;
Index: i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.288
diff -c -p -d -r1.288 i386.md
*** i386.md 2001/07/20 12:15:36 1.288
--- i386.md 2001/07/23 21:13:21
***************
*** 13133,13138 ****
--- 13133,13157 ----
(match_dup 0)
(pc)))]
"")
+
+ ;; Convert setcc + movzbl to xor + setcc if operands don't overlap.
+
+ (define_peephole2
+ [(set (reg 17) (match_operand 0 "" ""))
+ (set (match_operand:QI 1 "register_operand" "")
+ (match_operator:QI 2 "ix86_comparison_operator"
+ [(reg 17) (const_int 0)]))
+ (set (match_operand 3 "q_regs_operand" "")
+ (zero_extend (match_dup 1)))]
+ "peep2_reg_dead_p (3, operands[1])
+ && ! reg_overlap_mentioned_p (operands[3], operands[0])"
+ [(parallel [(set (match_dup 3) (const_int 0))
+ (clobber (reg:CC 17))])
+ (set (match_dup 4) (match_dup 0))
+ (set (strict_low_part (match_dup 5))
+ (match_dup 2))]
+ "operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17);
+ operands[5] = gen_rtx_REG (QImode, REGNO (operands[3]));")
;; Call instructions.