This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
[patch] Make h8300 port build again in mainline (2nd try)
- To: gcc-patches at gcc dot gnu dot org
- Subject: [patch] Make h8300 port build again in mainline (2nd try)
- From: Kazu Hirata <kazu at hxi dot com>
Hi,
As Jeff Law suggested, I integrated push patterns into movqi and movhi
patterns.
A new predicate general_operand_dst_push accepts what's accepted by
general_operand plus pre_modify stuff. Note that general_operand_dst
is used in several places, some of which have nothing to do with push.
This is why I created general_operand_dst_push.
A new constraint 'T' is used to catch an operand using pre_modify.
OK_FOR_T is based on a part of push_operand.
I split the existing movqi and movhi patterns into two pieces. One is
for movqi on TARGET_H8300 and the other on (TARGET_H8300H ||
TARGET_H8300S). This simplifies the patterns.
Tested on the h8300 port. OK to apply?
Kazu Hirata
2001-07-17 Kazu Hirata <kazu@hxi.com>
* config/h8300/h8300-protos.h: Add a prototype for
general_operand_dst_push.
* config/h8300/h8300.c (general_operand_dst_push): New.
* config/h8300/h8300.h (OK_FOR_T): New.
(EXTRA_CONSTRAINT): Use it.
* config/h8300/h8300.md (movqi_push): Remove and integrate into
the existing movqi pattern.
(movhi_push): Likewise.
Index: h8300-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300-protos.h,v
retrieving revision 1.9
diff -c -r1.9 h8300-protos.h
*** h8300-protos.h 2001/07/06 18:40:09 1.9
--- h8300-protos.h 2001/07/17 21:35:45
***************
*** 45,50 ****
--- 45,51 ----
extern int general_operand_src PARAMS ((rtx, enum machine_mode));
extern int general_operand_dst PARAMS ((rtx, enum machine_mode));
+ extern int general_operand_dst_push PARAMS ((rtx, enum machine_mode mode));
extern int o_operand PARAMS ((rtx, enum machine_mode));
extern int p_operand PARAMS ((rtx, enum machine_mode));
extern int call_insn_operand PARAMS ((rtx, enum machine_mode));
Index: h8300.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.c,v
retrieving revision 1.61
diff -c -r1.61 h8300.c
*** h8300.c 2001/07/07 01:07:19 1.61
--- h8300.c 2001/07/17 21:35:49
***************
*** 537,543 ****
}
/* Return true if OP is a valid destination operand for an integer move
! instruction. */
int
general_operand_dst (op, mode)
--- 537,543 ----
}
/* Return true if OP is a valid destination operand for an integer move
! instruction, excluding those involving pre_modify. */
int
general_operand_dst (op, mode)
***************
*** 547,552 ****
--- 547,566 ----
if (GET_CODE (op) == MEM && GET_CODE (XEXP (op, 0)) == PRE_DEC)
return 1;
return general_operand (op, mode);
+ }
+
+ /* Return true if OP is a valid destination operand for an integer move
+ instruction, including those involving pre_modify. */
+
+ int
+ general_operand_dst_push (op, mode)
+ rtx op;
+ enum machine_mode mode;
+ {
+ if (push_operand (op, mode))
+ return 1;
+
+ return general_operand_dst (op, mode);
}
/* Return true if OP is a const valid for a bit clear instruction. */
Index: h8300.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.h,v
retrieving revision 1.46
diff -c -r1.46 h8300.h
*** h8300.h 2001/07/09 06:10:01 1.46
--- h8300.h 2001/07/17 21:35:50
***************
*** 840,846 ****
(GET_CODE (X) == CONST_INT && TARGET_H8300H \
&& 0xffff00 <= INTVAL (X) && INTVAL (X) <= 0xffffff)
! /* 'U' if valid for a bset destination;
i.e. a register, register indirect, or the eightbit memory region
(a SYMBOL_REF with an SYMBOL_REF_FLAG set).
--- 840,856 ----
(GET_CODE (X) == CONST_INT && TARGET_H8300H \
&& 0xffff00 <= INTVAL (X) && INTVAL (X) <= 0xffffff)
! /* 'T' if valid for a push destination using pre_modify. */
! #define OK_FOR_T(OP) \
! (GET_CODE (OP) == MEM \
! && GET_CODE (XEXP (OP, 0)) == PRE_MODIFY \
! && GET_CODE (XEXP (XEXP (OP, 0), 1)) == PLUS \
! && XEXP (XEXP (XEXP (OP, 0), 1), 0) == XEXP (XEXP (OP, 0), 0) \
! && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 1), 1)) == CONST_INT \
! && INTVAL (XEXP (XEXP (XEXP (OP, 0), 1), 1)) == - (int) STACK_BOUNDARY / 8 \
! && XEXP (XEXP (OP, 0), 0) == stack_pointer_rtx)
!
! /* 'U' if valid for a bset destination;
i.e. a register, register indirect, or the eightbit memory region
(a SYMBOL_REF with an SYMBOL_REF_FLAG set).
***************
*** 862,868 ****
&& GET_CODE (XEXP (OP, 0)) == CONST_INT))
#define EXTRA_CONSTRAINT(OP, C) \
! ((C) == 'U' ? OK_FOR_U (OP) : \
0)
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
--- 872,879 ----
&& GET_CODE (XEXP (OP, 0)) == CONST_INT))
#define EXTRA_CONSTRAINT(OP, C) \
! ((C) == 'T' ? OK_FOR_T (OP) : \
! (C) == 'U' ? OK_FOR_U (OP) : \
0)
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
Index: h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.30
diff -c -r1.30 h8300.md
*** h8300.md 2001/06/13 17:41:19 1.30
--- h8300.md 2001/07/17 21:35:51
***************
*** 106,145 ****
;; movqi
! (define_insn "movqi_push"
! [(set (match_operand:QI 0 "push_operand" "=<")
! (match_operand:QI 1 "register_operand" "r"))]
! ""
! "*
! {
! if (TARGET_H8300)
! return \"push.w %T1\";
! else
! return \"push.l %S1\";
! }"
! [(set (attr "length") (if_then_else (eq_attr "cpu" "h8300") (const_int 2) (const_int 4)))
! (set_attr "cc" "set_znv")])
(define_insn ""
! [(set (match_operand:QI 0 "general_operand_dst" "=r,r,<,r,r,m")
! (match_operand:QI 1 "general_operand_src" "I,r>,r,n,m,r"))]
! "register_operand (operands[0],QImode)
! || register_operand (operands[1], QImode)"
"@
sub.b %X0,%X0
mov.b %R1,%X0
mov.b %X1,%R0
mov.b %R1,%X0
mov.b %R1,%X0
mov.b %X1,%R0"
! [(set_attr_alternative "length"
! [(const_int 2) (const_int 2) (const_int 2) (const_int 2)
! (if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))
! (if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))])
! (set_attr "cc" "set_zn,set_znv,set_znv,set_znv,set_znv,set_znv")])
(define_expand "movqi"
! [(set (match_operand:QI 0 "general_operand_dst" "")
(match_operand:QI 1 "general_operand_src" ""))]
""
"
--- 106,147 ----
;; movqi
! (define_insn ""
! [(set (match_operand:QI 0 "general_operand_dst_push" "=r,r ,<,T,r,r,m")
! (match_operand:QI 1 "general_operand_src" " I,r>,r,r,n,m,r"))]
! "TARGET_H8300
! && (register_operand (operands[0],QImode)
! || register_operand (operands[1], QImode))"
! "@
! sub.b %X0,%X0
! mov.b %R1,%X0
! mov.b %X1,%R0
! mov.w %T1,@-r7
! mov.b %R1,%X0
! mov.b %R1,%X0
! mov.b %X1,%R0"
! [(set_attr "length" "2,2,2,2,2,4,4")
! (set_attr "cc" "set_zn,set_znv,set_znv,clobber,set_znv,set_znv,set_znv")])
(define_insn ""
! [(set (match_operand:QI 0 "general_operand_dst_push" "=r,r ,<,r,T,r,m")
! (match_operand:QI 1 "general_operand_src" " I,r>,r,n,r,m,r"))]
! "(TARGET_H8300H || TARGET_H8300S)
! && (register_operand (operands[0],QImode)
! || register_operand (operands[1], QImode))"
"@
sub.b %X0,%X0
mov.b %R1,%X0
mov.b %X1,%R0
mov.b %R1,%X0
+ mov.l %S1,@-er7
mov.b %R1,%X0
mov.b %X1,%R0"
! [(set_attr "length" "2,2,2,2,4,8,8")
! (set_attr "cc" "set_zn,set_znv,set_znv,clobber,set_znv,set_znv,set_znv")])
(define_expand "movqi"
! [(set (match_operand:QI 0 "general_operand_dst_push" "")
(match_operand:QI 1 "general_operand_src" ""))]
""
"
***************
*** 168,194 ****
;; movhi
- ;; ??? We use push.l on the h8300h to push a 16bit value?!? We have
- ;; 16bit push insns!
- (define_insn "movhi_push"
- [(set (match_operand:HI 0 "push_operand" "=<")
- (match_operand:HI 1 "register_operand" "r"))]
- ""
- "*
- {
- if (TARGET_H8300)
- return \"push.w %T1\";
- else
- return \"push.l %S1\";
- }"
- [(set (attr "length") (if_then_else (eq_attr "cpu" "h8300") (const_int 2) (const_int 4)))
- (set_attr "cc" "set_znv")])
-
(define_insn ""
[(set (match_operand:HI 0 "general_operand_dst" "=r,r,<,r,r,m")
(match_operand:HI 1 "general_operand_src" "I,r>,r,i,m,r"))]
! "register_operand (operands[0],HImode)
! || register_operand (operands[1], HImode)"
"@
sub.w %T0,%T0
mov.w %T1,%T0
--- 170,181 ----
;; movhi
(define_insn ""
[(set (match_operand:HI 0 "general_operand_dst" "=r,r,<,r,r,m")
(match_operand:HI 1 "general_operand_src" "I,r>,r,i,m,r"))]
! "TARGET_H8300
! && (register_operand (operands[0],HImode)
! || register_operand (operands[1], HImode))"
"@
sub.w %T0,%T0
mov.w %T1,%T0
***************
*** 196,209 ****
mov.w %T1,%T0
mov.w %T1,%T0
mov.w %T1,%T0"
! [(set_attr_alternative "length"
! [(const_int 2) (const_int 2) (const_int 2) (const_int 4)
! (if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))
! (if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))])
(set_attr "cc" "set_zn,set_znv,set_znv,set_znv,set_znv,set_znv")])
(define_expand "movhi"
! [(set (match_operand:HI 0 "general_operand_dst" "")
(match_operand:HI 1 "general_operand_src" ""))]
""
"
--- 183,210 ----
mov.w %T1,%T0
mov.w %T1,%T0
mov.w %T1,%T0"
! [(set_attr "length" "2,2,2,4,4,4")
(set_attr "cc" "set_zn,set_znv,set_znv,set_znv,set_znv,set_znv")])
+ (define_insn ""
+ [(set (match_operand:HI 0 "general_operand_dst_push" "=r,r,<,T,r,r,m")
+ (match_operand:HI 1 "general_operand_src" "I,r>,r,r,i,m,r"))]
+ "(TARGET_H8300H || TARGET_H8300S)
+ && (register_operand (operands[0],HImode)
+ || register_operand (operands[1], HImode))"
+ "@
+ sub.w %T0,%T0
+ mov.w %T1,%T0
+ mov.w %T1,%T0
+ mov.l %S1,@-er7
+ mov.w %T1,%T0
+ mov.w %T1,%T0
+ mov.w %T1,%T0"
+ [(set_attr "length" "2,2,2,4,4,8,8")
+ (set_attr "cc" "set_zn,set_znv,set_znv,clobber,set_znv,set_znv,set_znv")])
+
(define_expand "movhi"
! [(set (match_operand:HI 0 "general_operand_dst_push" "")
(match_operand:HI 1 "general_operand_src" ""))]
""
"