This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

alpha abi cleanup


Add TARGET_ABI_OSF so that we're not saying (!NT && !VMS) everywhere.
Rename the others TARGET_ABI_* so that its clear that we're talking
about the ABI rather than some other aspect of the OS.

Tested on alphaev56-linux.



r~


        * config/alpha/alpha.h (TARGET_ABI_OSF): New.
        (TARGET_ABI_WINDOWS_NT, TARGET_ABI_OPEN_VMS): Rename; update users.
        * config/alpha/alpha-protos.h: Update TARGET_ABI_* users.
        * config/alpha/alpha.c: Likewise.
        * config/alpha/alpha.md: Likewise.
        * config/alpha/alpha32.h: Likewise.
        * config/alpha/vms.h: Likewise.
        (OPEN_VMS): Remove.

Index: alpha-protos.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/alpha/alpha-protos.h,v
retrieving revision 1.17
diff -c -p -d -r1.17 alpha-protos.h
*** alpha-protos.h	2001/07/08 19:55:56	1.17
--- alpha-protos.h	2001/07/15 07:08:58
*************** extern int check_float_value PARAMS ((en
*** 111,117 ****
  				     REAL_VALUE_TYPE *, int));
  #endif
  
! #if OPEN_VMS
  #ifdef HAVE_MACHINE_MODES
  extern enum avms_arg_type alpha_arg_type PARAMS ((enum machine_mode));
  #endif
--- 111,117 ----
  				     REAL_VALUE_TYPE *, int));
  #endif
  
! #if TARGET_ABI_OPEN_VMS
  #ifdef HAVE_MACHINE_MODES
  extern enum avms_arg_type alpha_arg_type PARAMS ((enum machine_mode));
  #endif
*************** extern rtx alpha_arg_info_reg_val PARAMS
*** 121,127 ****
  #ifdef BUFSIZ
  extern void alpha_write_linkage PARAMS ((FILE *));
  #endif
! #endif /* OPEN_VMS */
  
  #ifdef RTX_CODE
  extern rtx alpha_need_linkage PARAMS ((const char *, int));
--- 121,127 ----
  #ifdef BUFSIZ
  extern void alpha_write_linkage PARAMS ((FILE *));
  #endif
! #endif /* TARGET_ABI_OPEN_VMS */
  
  #ifdef RTX_CODE
  extern rtx alpha_need_linkage PARAMS ((const char *, int));
Index: alpha.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/alpha/alpha.c,v
retrieving revision 1.171
diff -c -p -d -r1.171 alpha.c
*** alpha.c	2001/07/11 20:35:52	1.171
--- alpha.c	2001/07/15 07:08:58
*************** static void alpha_output_function_end_pr
*** 133,139 ****
    PARAMS ((FILE *));
  
  /* Get the number of args of a function in one of two ways.  */
! #ifdef OPEN_VMS
  #define NUM_ARGS current_function_args_info.num_args
  #else
  #define NUM_ARGS current_function_args_info
--- 133,139 ----
    PARAMS ((FILE *));
  
  /* Get the number of args of a function in one of two ways.  */
! #if TARGET_ABI_OPEN_VMS
  #define NUM_ARGS current_function_args_info.num_args
  #else
  #define NUM_ARGS current_function_args_info
*************** static void alpha_output_function_end_pr
*** 143,149 ****
  #define REG_RA 26
  
  /* Initialize the GCC target structure.  */
! #ifdef OPEN_VMS
     static int vms_valid_decl_attribute_p PARAMS ((tree, tree, tree, tree));
  #  undef TARGET_VALID_DECL_ATTRIBUTE
  #  define TARGET_VALID_DECL_ATTRIBUTE vms_valid_decl_attribute_p
--- 143,149 ----
  #define REG_RA 26
  
  /* Initialize the GCC target structure.  */
! #if TARGET_ABI_OPEN_VMS
     static int vms_valid_decl_attribute_p PARAMS ((tree, tree, tree, tree));
  #  undef TARGET_VALID_DECL_ATTRIBUTE
  #  define TARGET_VALID_DECL_ATTRIBUTE vms_valid_decl_attribute_p
*************** call_operand (op, mode)
*** 740,748 ****
    if (mode != Pmode)
      return 0;
  
!   return (GET_CODE (op) == SYMBOL_REF
! 	  || (GET_CODE (op) == REG
! 	      && (TARGET_OPEN_VMS || TARGET_WINDOWS_NT || REGNO (op) == 27)));
  }
  
  /* Return 1 if OP is a valid Alpha comparison operator.  Here we know which
--- 740,756 ----
    if (mode != Pmode)
      return 0;
  
!   if (GET_CODE (op) == SYMBOL_REF)
!     return 1;
!   if (GET_CODE (op) == REG)
!     {
!       if (TARGET_ABI_OSF)
! 	return REGNO (op) == 27;
!       else
! 	return 1;
!     }
! 
!   return 0;
  }
  
  /* Return 1 if OP is a valid Alpha comparison operator.  Here we know which
*************** addition_operation (op, mode)
*** 1059,1065 ****
  int
  direct_return ()
  {
!   return (! TARGET_OPEN_VMS && reload_completed && alpha_sa_size () == 0
  	  && get_frame_size () == 0
  	  && current_function_outgoing_args_size == 0
  	  && current_function_pretend_args_size == 0);
--- 1067,1075 ----
  int
  direct_return ()
  {
!   return (! TARGET_ABI_OPEN_VMS
! 	  && reload_completed
! 	  && alpha_sa_size () == 0
  	  && get_frame_size () == 0
  	  && current_function_outgoing_args_size == 0
  	  && current_function_pretend_args_size == 0);
*************** alpha_lookup_xfloating_lib_func (code)
*** 2156,2162 ****
       knowledge of the G_floating routines.  */
    if (TARGET_FLOAT_VAX)
      {
!       if (TARGET_OPEN_VMS)
  	{
  	  if (code == FLOAT_EXTEND)
  	    return "OTS$CVT_FLOAT_G_X";
--- 2166,2172 ----
       knowledge of the G_floating routines.  */
    if (TARGET_FLOAT_VAX)
      {
!       if (TARGET_ABI_OPEN_VMS)
  	{
  	  if (code == FLOAT_EXTEND)
  	    return "OTS$CVT_FLOAT_G_X";
*************** alpha_lookup_xfloating_lib_func (code)
*** 2172,2178 ****
  	}
      }
  
!   if (TARGET_OPEN_VMS)
      ops = vms_xfloating_ops;
    else
      ops = osf_xfloating_ops;
--- 2182,2188 ----
  	}
      }
  
!   if (TARGET_ABI_OPEN_VMS)
      ops = vms_xfloating_ops;
    else
      ops = osf_xfloating_ops;
*************** alpha_initialize_trampoline (tramp, fnad
*** 4057,4063 ****
  {
    rtx temp, temp1, addr;
    /* VMS really uses DImode pointers in memory at this point.  */
!   enum machine_mode mode = TARGET_OPEN_VMS ? Pmode : ptr_mode;
  
  #ifdef POINTERS_EXTEND_UNSIGNED
    fnaddr = convert_memory_address (mode, fnaddr);
--- 4067,4073 ----
  {
    rtx temp, temp1, addr;
    /* VMS really uses DImode pointers in memory at this point.  */
!   enum machine_mode mode = TARGET_ABI_OPEN_VMS ? Pmode : ptr_mode;
  
  #ifdef POINTERS_EXTEND_UNSIGNED
    fnaddr = convert_memory_address (mode, fnaddr);
*************** function_arg (cum, mode, type, named)
*** 4126,4132 ****
    int basereg;
    int num_args;
  
! #ifndef OPEN_VMS
    if (cum >= 6)
      return NULL_RTX;
    num_args = cum;
--- 4136,4149 ----
    int basereg;
    int num_args;
  
! #if TARGET_ABI_OPEN_VMS
!   if (mode == VOIDmode)
!     return alpha_arg_info_reg_val (cum);
! 
!   num_args = cum.num_args;
!   if (num_args >= 6 || MUST_PASS_IN_STACK (mode, type))
!     return NULL_RTX;
! #else
    if (cum >= 6)
      return NULL_RTX;
    num_args = cum;
*************** function_arg (cum, mode, type, named)
*** 4138,4151 ****
      return NULL_RTX;
    else if (FUNCTION_ARG_PASS_BY_REFERENCE (cum, mode, type, named))
      basereg = 16;
! #else
!   if (mode == VOIDmode)
!     return alpha_arg_info_reg_val (cum);
! 
!   num_args = cum.num_args;
!   if (num_args >= 6 || MUST_PASS_IN_STACK (mode, type))
!     return NULL_RTX;
! #endif /* OPEN_VMS */
    else if (TARGET_FPREGS
  	   && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
  	       || GET_MODE_CLASS (mode) == MODE_FLOAT))
--- 4155,4161 ----
      return NULL_RTX;
    else if (FUNCTION_ARG_PASS_BY_REFERENCE (cum, mode, type, named))
      basereg = 16;
! #endif /* TARGET_ABI_OPEN_VMS */
    else if (TARGET_FPREGS
  	   && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
  	       || GET_MODE_CLASS (mode) == MODE_FLOAT))
*************** alpha_build_va_list ()
*** 4161,4167 ****
  {
    tree base, ofs, record, type_decl;
  
!   if (TARGET_OPEN_VMS)
      return ptr_type_node;
  
    record = make_lang_type (RECORD_TYPE);
--- 4171,4177 ----
  {
    tree base, ofs, record, type_decl;
  
!   if (TARGET_ABI_OPEN_VMS)
      return ptr_type_node;
  
    record = make_lang_type (RECORD_TYPE);
*************** alpha_va_start (stdarg_p, valist, nextar
*** 4198,4204 ****
    if (TREE_CODE (TREE_TYPE (valist)) == ERROR_MARK)
      return;
  
!   if (TARGET_OPEN_VMS)
      std_expand_builtin_va_start (stdarg_p, valist, nextarg);
  
    /* For Unix, SETUP_INCOMING_VARARGS moves the starting address base
--- 4208,4214 ----
    if (TREE_CODE (TREE_TYPE (valist)) == ERROR_MARK)
      return;
  
!   if (TARGET_ABI_OPEN_VMS)
      std_expand_builtin_va_start (stdarg_p, valist, nextarg);
  
    /* For Unix, SETUP_INCOMING_VARARGS moves the starting address base
*************** alpha_va_arg (valist, type)
*** 4246,4252 ****
    tree wide_type, wide_ofs;
    int indirect = 0;
  
!   if (TARGET_OPEN_VMS)
      return std_expand_builtin_va_arg (valist, type);
  
    tsize = ((TREE_INT_CST_LOW (TYPE_SIZE (type)) / BITS_PER_UNIT + 7) / 8) * 8;
--- 4256,4262 ----
    tree wide_type, wide_ofs;
    int indirect = 0;
  
!   if (TARGET_ABI_OPEN_VMS)
      return std_expand_builtin_va_arg (valist, type);
  
    tsize = ((TREE_INT_CST_LOW (TYPE_SIZE (type)) / BITS_PER_UNIT + 7) / 8) * 8;
*************** alpha_sa_mask (imaskP, fmaskP)
*** 4343,4349 ****
    if (!current_function_is_thunk)
  #endif
      {
!       if (TARGET_OPEN_VMS && vms_is_stack_procedure)
  	imask |= (1L << HARD_FRAME_POINTER_REGNUM);
  
        /* One for every register we have to save.  */
--- 4353,4359 ----
    if (!current_function_is_thunk)
  #endif
      {
!       if (TARGET_ABI_OPEN_VMS && vms_is_stack_procedure)
  	imask |= (1L << HARD_FRAME_POINTER_REGNUM);
  
        /* One for every register we have to save.  */
*************** alpha_sa_size ()
*** 4396,4402 ****
  	  sa_size++;
      }
  
!   if (TARGET_OPEN_VMS)
      {
        /* Start by assuming we can use a register procedure if we don't
  	 make any calls (REG_RA not used) or need to save any
--- 4406,4412 ----
  	  sa_size++;
      }
  
!   if (TARGET_ABI_OPEN_VMS)
      {
        /* Start by assuming we can use a register procedure if we don't
  	 make any calls (REG_RA not used) or need to save any
*************** alpha_using_fp ()
*** 4462,4468 ****
    return vms_unwind_regno == HARD_FRAME_POINTER_REGNUM;
  }
  
! #ifdef OPEN_VMS
  
  static int
  vms_valid_decl_attribute_p (decl, attributes, identifier, args)
--- 4472,4478 ----
    return vms_unwind_regno == HARD_FRAME_POINTER_REGNUM;
  }
  
! #if TARGET_ABI_OPEN_VMS
  
  static int
  vms_valid_decl_attribute_p (decl, attributes, identifier, args)
*************** alpha_does_function_need_gp ()
*** 4484,4490 ****
    rtx insn;
  
    /* We never need a GP for Windows/NT or VMS.  */
!   if (TARGET_WINDOWS_NT || TARGET_OPEN_VMS)
      return 0;
  
    if (TARGET_PROFILING_NEEDS_GP && profile_flag)
--- 4494,4500 ----
    rtx insn;
  
    /* We never need a GP for Windows/NT or VMS.  */
!   if (TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS)
      return 0;
  
    if (TARGET_PROFILING_NEEDS_GP && profile_flag)
*************** alpha_expand_prologue ()
*** 4593,4599 ****
    sa_size = alpha_sa_size ();
  
    frame_size = get_frame_size ();
!   if (TARGET_OPEN_VMS)
      frame_size = ALPHA_ROUND (sa_size 
  			      + (vms_is_stack_procedure ? 8 : 0)
  			      + frame_size
--- 4603,4609 ----
    sa_size = alpha_sa_size ();
  
    frame_size = get_frame_size ();
!   if (TARGET_ABI_OPEN_VMS)
      frame_size = ALPHA_ROUND (sa_size 
  			      + (vms_is_stack_procedure ? 8 : 0)
  			      + frame_size
*************** alpha_expand_prologue ()
*** 4604,4610 ****
  		  + ALPHA_ROUND (frame_size
  				 + current_function_pretend_args_size));
  
!   if (TARGET_OPEN_VMS)
      reg_offset = 8;
    else
      reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
--- 4614,4620 ----
  		  + ALPHA_ROUND (frame_size
  				 + current_function_pretend_args_size));
  
!   if (TARGET_ABI_OPEN_VMS)
      reg_offset = 8;
    else
      reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
*************** alpha_expand_prologue ()
*** 4612,4618 ****
    alpha_sa_mask (&imask, &fmask);
  
    /* Emit an insn to reload GP, if needed.  */
!   if (!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT)
      {
        alpha_function_needs_gp = alpha_does_function_need_gp ();
        if (alpha_function_needs_gp)
--- 4622,4628 ----
    alpha_sa_mask (&imask, &fmask);
  
    /* Emit an insn to reload GP, if needed.  */
!   if (TARGET_ABI_OSF)
      {
        alpha_function_needs_gp = alpha_does_function_need_gp ();
        if (alpha_function_needs_gp)
*************** alpha_expand_prologue ()
*** 4682,4688 ****
  	  emit_move_insn (last, const0_rtx);
  	}
  
!       if (TARGET_WINDOWS_NT)
  	{
  	  /* For NT stack unwind (done by 'reverse execution'), it's
  	     not OK to take the result of a loop, even though the value
--- 4692,4698 ----
  	  emit_move_insn (last, const0_rtx);
  	}
  
!       if (TARGET_ABI_WINDOWS_NT)
  	{
  	  /* For NT stack unwind (done by 'reverse execution'), it's
  	     not OK to take the result of a loop, even though the value
*************** alpha_expand_prologue ()
*** 4737,4743 ****
      }
      
    /* Save regs in stack order.  Beginning with VMS PV.  */
!   if (TARGET_OPEN_VMS && vms_is_stack_procedure)
      {
        mem = gen_rtx_MEM (DImode, stack_pointer_rtx);
        set_mem_alias_set (mem, alpha_sr_alias_set);
--- 4747,4753 ----
      }
      
    /* Save regs in stack order.  Beginning with VMS PV.  */
!   if (TARGET_ABI_OPEN_VMS && vms_is_stack_procedure)
      {
        mem = gen_rtx_MEM (DImode, stack_pointer_rtx);
        set_mem_alias_set (mem, alpha_sr_alias_set);
*************** alpha_expand_prologue ()
*** 4773,4779 ****
  	reg_offset += 8;
        }
  
!   if (TARGET_OPEN_VMS)
      {
        if (!vms_is_stack_procedure)
  	/* Register frame procedures fave the fp.  */
--- 4783,4789 ----
  	reg_offset += 8;
        }
  
!   if (TARGET_ABI_OPEN_VMS)
      {
        if (!vms_is_stack_procedure)
  	/* Register frame procedures fave the fp.  */
*************** alpha_start_function (file, fnname, decl
*** 4847,4853 ****
    sa_size = alpha_sa_size ();
  
    frame_size = get_frame_size ();
!   if (TARGET_OPEN_VMS)
      frame_size = ALPHA_ROUND (sa_size 
  			      + (vms_is_stack_procedure ? 8 : 0)
  			      + frame_size
--- 4857,4863 ----
    sa_size = alpha_sa_size ();
  
    frame_size = get_frame_size ();
!   if (TARGET_ABI_OPEN_VMS)
      frame_size = ALPHA_ROUND (sa_size 
  			      + (vms_is_stack_procedure ? 8 : 0)
  			      + frame_size
*************** alpha_start_function (file, fnname, decl
*** 4858,4864 ****
  		  + ALPHA_ROUND (frame_size
  				 + current_function_pretend_args_size));
  
!   if (TARGET_OPEN_VMS)
      reg_offset = 8;
    else
      reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
--- 4868,4874 ----
  		  + ALPHA_ROUND (frame_size
  				 + current_function_pretend_args_size));
  
!   if (TARGET_ABI_OPEN_VMS)
      reg_offset = 8;
    else
      reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
*************** alpha_start_function (file, fnname, decl
*** 4883,4889 ****
      }
  
    /* Issue function start and label.  */
!   if (TARGET_OPEN_VMS || !flag_inhibit_size_directive)
      {
        fputs ("\t.ent ", file);
        assemble_name (file, fnname);
--- 4893,4899 ----
      }
  
    /* Issue function start and label.  */
!   if (TARGET_ABI_OPEN_VMS || !flag_inhibit_size_directive)
      {
        fputs ("\t.ent ", file);
        assemble_name (file, fnname);
*************** alpha_start_function (file, fnname, decl
*** 4891,4898 ****
  
        /* If the function needs GP, we'll write the "..ng" label there.
  	 Otherwise, do it here.  */
!       if (! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT
! 	  && ! alpha_function_needs_gp)
  	{
  	  putc ('$', file);
  	  assemble_name (file, fnname);
--- 4901,4907 ----
  
        /* If the function needs GP, we'll write the "..ng" label there.
  	 Otherwise, do it here.  */
!       if (TARGET_ABI_OSF && ! alpha_function_needs_gp)
  	{
  	  putc ('$', file);
  	  assemble_name (file, fnname);
*************** alpha_start_function (file, fnname, decl
*** 4901,4915 ****
      }
  
    strcpy (entry_label, fnname);
!   if (TARGET_OPEN_VMS)
      strcat (entry_label, "..en");
    ASM_OUTPUT_LABEL (file, entry_label);
    inside_function = TRUE;
  
!   if (TARGET_OPEN_VMS)
      fprintf (file, "\t.base $%d\n", vms_base_regno);
  
!   if (!TARGET_OPEN_VMS && TARGET_IEEE_CONFORMANT
        && !flag_inhibit_size_directive)
      {
        /* Set flags in procedure descriptor to request IEEE-conformant
--- 4910,4924 ----
      }
  
    strcpy (entry_label, fnname);
!   if (TARGET_ABI_OPEN_VMS)
      strcat (entry_label, "..en");
    ASM_OUTPUT_LABEL (file, entry_label);
    inside_function = TRUE;
  
!   if (TARGET_ABI_OPEN_VMS)
      fprintf (file, "\t.base $%d\n", vms_base_regno);
  
!   if (!TARGET_ABI_OPEN_VMS && TARGET_IEEE_CONFORMANT
        && !flag_inhibit_size_directive)
      {
        /* Set flags in procedure descriptor to request IEEE-conformant
*************** alpha_start_function (file, fnname, decl
*** 4925,4931 ****
    /* Describe our frame.  If the frame size is larger than an integer,
       print it as zero to avoid an assembler error.  We won't be
       properly describing such a frame, but that's the best we can do.  */
!   if (TARGET_OPEN_VMS)
      {
        fprintf (file, "\t.frame $%d,", vms_unwind_regno);
        fprintf (file, HOST_WIDE_INT_PRINT_DEC,
--- 4934,4940 ----
    /* Describe our frame.  If the frame size is larger than an integer,
       print it as zero to avoid an assembler error.  We won't be
       properly describing such a frame, but that's the best we can do.  */
!   if (TARGET_ABI_OPEN_VMS)
      {
        fprintf (file, "\t.frame $%d,", vms_unwind_regno);
        fprintf (file, HOST_WIDE_INT_PRINT_DEC,
*************** alpha_start_function (file, fnname, decl
*** 4945,4951 ****
      }
  
    /* Describe which registers were spilled.  */
!   if (TARGET_OPEN_VMS)
      {
        if (imask)
          /* ??? Does VMS care if mask contains ra?  The old code did'nt
--- 4954,4960 ----
      }
  
    /* Describe which registers were spilled.  */
!   if (TARGET_ABI_OPEN_VMS)
      {
        if (imask)
          /* ??? Does VMS care if mask contains ra?  The old code did'nt
*************** alpha_start_function (file, fnname, decl
*** 4979,4985 ****
  	}
      }
  
! #ifdef OPEN_VMS
    /* Ifdef'ed cause readonly_section and link_section are only
       available then.  */
    readonly_section ();
--- 4988,4994 ----
  	}
      }
  
! #if TARGET_ABI_OPEN_VMS
    /* Ifdef'ed cause readonly_section and link_section are only
       available then.  */
    readonly_section ();
*************** static void
*** 5009,5017 ****
  alpha_output_function_end_prologue (file)
       FILE *file;
  {
!   if (TARGET_OPEN_VMS)
      fputs ("\t.prologue\n", file);
!   else if (TARGET_WINDOWS_NT)
      fputs ("\t.prologue 0\n", file);
    else if (!flag_inhibit_size_directive)
      fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp);
--- 5018,5026 ----
  alpha_output_function_end_prologue (file)
       FILE *file;
  {
!   if (TARGET_ABI_OPEN_VMS)
      fputs ("\t.prologue\n", file);
!   else if (TARGET_ABI_WINDOWS_NT)
      fputs ("\t.prologue 0\n", file);
    else if (!flag_inhibit_size_directive)
      fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp);
*************** alpha_expand_epilogue ()
*** 5046,5052 ****
    sa_size = alpha_sa_size ();
  
    frame_size = get_frame_size ();
!   if (TARGET_OPEN_VMS)
      frame_size = ALPHA_ROUND (sa_size 
  			      + (vms_is_stack_procedure ? 8 : 0)
  			      + frame_size
--- 5055,5061 ----
    sa_size = alpha_sa_size ();
  
    frame_size = get_frame_size ();
!   if (TARGET_ABI_OPEN_VMS)
      frame_size = ALPHA_ROUND (sa_size 
  			      + (vms_is_stack_procedure ? 8 : 0)
  			      + frame_size
*************** alpha_expand_epilogue ()
*** 5057,5071 ****
  		  + ALPHA_ROUND (frame_size
  				 + current_function_pretend_args_size));
  
!   if (TARGET_OPEN_VMS)
      reg_offset = 8;
    else
      reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
  
    alpha_sa_mask (&imask, &fmask);
  
!   fp_is_frame_pointer = ((TARGET_OPEN_VMS && vms_is_stack_procedure)
! 			 || (!TARGET_OPEN_VMS && frame_pointer_needed));
    fp_offset = 0;
    sa_reg = stack_pointer_rtx;
  
--- 5066,5080 ----
  		  + ALPHA_ROUND (frame_size
  				 + current_function_pretend_args_size));
  
!   if (TARGET_ABI_OPEN_VMS)
      reg_offset = 8;
    else
      reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
  
    alpha_sa_mask (&imask, &fmask);
  
!   fp_is_frame_pointer = ((TARGET_ABI_OPEN_VMS && vms_is_stack_procedure)
! 			 || (!TARGET_ABI_OPEN_VMS && frame_pointer_needed));
    fp_offset = 0;
    sa_reg = stack_pointer_rtx;
  
*************** alpha_expand_epilogue ()
*** 5077,5085 ****
    if (sa_size)
      {
        /* If we have a frame pointer, restore SP from it.  */
!       if ((TARGET_OPEN_VMS
  	   && vms_unwind_regno == HARD_FRAME_POINTER_REGNUM)
! 	  || (!TARGET_OPEN_VMS && frame_pointer_needed))
  	FRP (emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx));
  
        /* Cope with very large offsets to the register save area.  */
--- 5086,5094 ----
    if (sa_size)
      {
        /* If we have a frame pointer, restore SP from it.  */
!       if ((TARGET_ABI_OPEN_VMS
  	   && vms_unwind_regno == HARD_FRAME_POINTER_REGNUM)
! 	  || (!TARGET_ABI_OPEN_VMS && frame_pointer_needed))
  	FRP (emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx));
  
        /* Cope with very large offsets to the register save area.  */
*************** alpha_expand_epilogue ()
*** 5188,5194 ****
  	  set_mem_alias_set (mem, alpha_sr_alias_set);
  	  FRP (emit_move_insn (hard_frame_pointer_rtx, mem));
  	}
!       else if (TARGET_OPEN_VMS)
  	{
  	  emit_insn (gen_blockage ());
  	  FRP (emit_move_insn (hard_frame_pointer_rtx,
--- 5197,5203 ----
  	  set_mem_alias_set (mem, alpha_sr_alias_set);
  	  FRP (emit_move_insn (hard_frame_pointer_rtx, mem));
  	}
!       else if (TARGET_ABI_OPEN_VMS)
  	{
  	  emit_insn (gen_blockage ());
  	  FRP (emit_move_insn (hard_frame_pointer_rtx,
*************** alpha_expand_epilogue ()
*** 5202,5208 ****
      }
    else 
      {
!       if (TARGET_OPEN_VMS && !vms_is_stack_procedure)
          {
            emit_insn (gen_blockage ());
            FRP (emit_move_insn (hard_frame_pointer_rtx,
--- 5211,5217 ----
      }
    else 
      {
!       if (TARGET_ABI_OPEN_VMS && !vms_is_stack_procedure)
          {
            emit_insn (gen_blockage ());
            FRP (emit_move_insn (hard_frame_pointer_rtx,
*************** check_float_value (mode, d, overflow)
*** 6270,6276 ****
    return 0;
  }
  
! #if OPEN_VMS
  
  /* Return the VMS argument type corresponding to MODE.  */
  
--- 6279,6285 ----
    return 0;
  }
  
! #if TARGET_ABI_OPEN_VMS
  
  /* Return the VMS argument type corresponding to MODE.  */
  
*************** alpha_need_linkage (name, is_local)
*** 6466,6469 ****
    return NULL_RTX;
  }
  
! #endif /* OPEN_VMS */
--- 6475,6478 ----
    return NULL_RTX;
  }
  
! #endif /* TARGET_ABI_OPEN_VMS */
Index: alpha.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/alpha/alpha.h,v
retrieving revision 1.124
diff -c -p -d -r1.124 alpha.h
*** alpha.h	2001/07/09 06:09:58	1.124
--- alpha.h	2001/07/15 07:08:58
*************** extern enum alpha_fp_trap_mode alpha_fpt
*** 173,184 ****
  #define TARGET_SUPPORT_ARCH	(target_flags & MASK_SUPPORT_ARCH)
  
  /* These are for target os support and cannot be changed at runtime.  */
! #ifndef TARGET_WINDOWS_NT
! #define TARGET_WINDOWS_NT 0
! #endif
! #ifndef TARGET_OPEN_VMS
! #define TARGET_OPEN_VMS 0
! #endif
  
  #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
  #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
--- 173,181 ----
  #define TARGET_SUPPORT_ARCH	(target_flags & MASK_SUPPORT_ARCH)
  
  /* These are for target os support and cannot be changed at runtime.  */
! #define TARGET_ABI_WINDOWS_NT 0
! #define TARGET_ABI_OPEN_VMS 0
! #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT && !TARGET_ABI_OPEN_VMS)
  
  #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
  #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
*************** literal_section ()						\
*** 2147,2153 ****
  /* This is how to output an element of a case-vector that is relative.  */
  
  #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
!   fprintf (FILE, "\t.%s $L%d\n", TARGET_WINDOWS_NT ? "long" : "gprel32", \
  	   (VALUE))
  
  /* This is how to output an assembler line
--- 2144,2150 ----
  /* This is how to output an element of a case-vector that is relative.  */
  
  #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
!   fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
  	   (VALUE))
  
  /* This is how to output an assembler line
*************** do {									\
*** 2197,2203 ****
    const char *fn_name = XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0);	\
    int reg;								\
  									\
!   if (! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT)				\
      fprintf (FILE, "\tldgp $29,0($27)\n");				\
  									\
    /* Mark end of prologue.  */						\
--- 2194,2200 ----
    const char *fn_name = XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0);	\
    int reg;								\
  									\
!   if (TARGET_ABI_OSF)							\
      fprintf (FILE, "\tldgp $29,0($27)\n");				\
  									\
    /* Mark end of prologue.  */						\
Index: alpha.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/alpha/alpha.md,v
retrieving revision 1.142
diff -c -p -d -r1.142 alpha.md
*** alpha.md	2001/07/15 06:25:01	1.142
--- alpha.md	2001/07/15 07:08:58
***************
*** 227,240 ****
    (and (eq_attr "cpu" "ev5")
         (eq_attr "type" "fadd,fcmov,fmul,fcpys,fbr,fdiv"))
    4 1)
!   
  (define_function_unit "ev5_fm" 1 0
    (and (eq_attr "cpu" "ev5")
         (eq_attr "type" "fmul"))
    4 1)
  
  ; Add and cmov as you would expect; fbr never produces a result;
! ; fdiv issues through fa to the divider, 
  (define_function_unit "ev5_fa" 1 0
    (and (eq_attr "cpu" "ev5")
         (eq_attr "type" "fadd,fcmov,fbr,fdiv"))
--- 227,240 ----
    (and (eq_attr "cpu" "ev5")
         (eq_attr "type" "fadd,fcmov,fmul,fcpys,fbr,fdiv"))
    4 1)
! 
  (define_function_unit "ev5_fm" 1 0
    (and (eq_attr "cpu" "ev5")
         (eq_attr "type" "fmul"))
    4 1)
  
  ; Add and cmov as you would expect; fbr never produces a result;
! ; fdiv issues through fa to the divider,
  (define_function_unit "ev5_fa" 1 0
    (and (eq_attr "cpu" "ev5")
         (eq_attr "type" "fadd,fcmov,fbr,fdiv"))
***************
*** 259,265 ****
  ;; EV6 has two symmetric pairs ("clusters") of two asymetric integer units
  ;; ("upper" and "lower"), yielding pipe names U0, U1, L0, L1.
  
! ;; Conditional moves decompose into two independant primitives, each 
  ;; taking one cycle.  Since ev6 is out-of-order, we can't see anything
  ;; but two cycles.
  (define_function_unit "ev6_ebox" 4 0
--- 259,265 ----
  ;; EV6 has two symmetric pairs ("clusters") of two asymetric integer units
  ;; ("upper" and "lower"), yielding pipe names U0, U1, L0, L1.
  
! ;; Conditional moves decompose into two independant primitives, each
  ;; taking one cycle.  Since ev6 is out-of-order, we can't see anything
  ;; but two cycles.
  (define_function_unit "ev6_ebox" 4 0
***************
*** 344,350 ****
  
  ;; For the FPU we are very similar to EV5, except there's no insn that
  ;; can issue to fm & fa, so we get to leave that out.
!   
  (define_function_unit "ev6_fm" 1 0
    (and (eq_attr "cpu" "ev6")
         (eq_attr "type" "fmul"))
--- 344,350 ----
  
  ;; For the FPU we are very similar to EV5, except there's no insn that
  ;; can issue to fm & fa, so we get to leave that out.
! 
  (define_function_unit "ev6_fm" 1 0
    (and (eq_attr "cpu" "ev6")
         (eq_attr "type" "fmul"))
***************
*** 614,620 ****
  ;;   (that's a bug, but not one we can do anything about).  As of NT4.0 SP3,
  ;;   the exception handling code will loop if a subq is used and an
  ;;   exception occurs.
! ;;  
  ;;   The 19980616 change to emit prologues as RTL also confused some
  ;;   versions of GDB, which also interprets prologues.  This has been
  ;;   fixed as of GDB 4.18, but it does not harm to unconditionally
--- 614,620 ----
  ;;   (that's a bug, but not one we can do anything about).  As of NT4.0 SP3,
  ;;   the exception handling code will loop if a subq is used and an
  ;;   exception occurs.
! ;;
  ;;   The 19980616 change to emit prologues as RTL also confused some
  ;;   versions of GDB, which also interprets prologues.  This has been
  ;;   fixed as of GDB 4.18, but it does not harm to unconditionally
***************
*** 986,992 ****
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand" "")
  	(subreg:SI (reg:DI 27) 0))]
!   "!TARGET_OPEN_VMS"
    "")
  
  (define_expand "udivsi3"
--- 986,992 ----
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand" "")
  	(subreg:SI (reg:DI 27) 0))]
!   "! TARGET_ABI_OPEN_VMS"
    "")
  
  (define_expand "udivsi3"
***************
*** 1000,1006 ****
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand" "")
  	(subreg:SI (reg:DI 27) 0))]
!   "!TARGET_OPEN_VMS"
    "")
  
  (define_expand "modsi3"
--- 1000,1006 ----
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand" "")
  	(subreg:SI (reg:DI 27) 0))]
!   "! TARGET_ABI_OPEN_VMS"
    "")
  
  (define_expand "modsi3"
***************
*** 1014,1020 ****
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand" "")
  	(subreg:SI (reg:DI 27) 0))]
!   "!TARGET_OPEN_VMS"
    "")
  
  (define_expand "umodsi3"
--- 1014,1020 ----
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand" "")
  	(subreg:SI (reg:DI 27) 0))]
!   "! TARGET_ABI_OPEN_VMS"
    "")
  
  (define_expand "umodsi3"
***************
*** 1028,1034 ****
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand" "")
  	(subreg:SI (reg:DI 27) 0))]
!   "!TARGET_OPEN_VMS"
    "")
  
  (define_expand "divdi3"
--- 1028,1034 ----
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand" "")
  	(subreg:SI (reg:DI 27) 0))]
!   "! TARGET_ABI_OPEN_VMS"
    "")
  
  (define_expand "divdi3"
***************
*** 1041,1047 ****
  	      (clobber (reg:DI 28))])
     (set (match_operand:DI 0 "nonimmediate_operand" "")
  	(reg:DI 27))]
!   "!TARGET_OPEN_VMS"
    "")
  
  (define_expand "udivdi3"
--- 1041,1047 ----
  	      (clobber (reg:DI 28))])
     (set (match_operand:DI 0 "nonimmediate_operand" "")
  	(reg:DI 27))]
!   "! TARGET_ABI_OPEN_VMS"
    "")
  
  (define_expand "udivdi3"
***************
*** 1054,1060 ****
  	      (clobber (reg:DI 28))])
     (set (match_operand:DI 0 "nonimmediate_operand" "")
  	(reg:DI 27))]
!   "!TARGET_OPEN_VMS"
    "")
  
  (define_expand "moddi3"
--- 1054,1060 ----
  	      (clobber (reg:DI 28))])
     (set (match_operand:DI 0 "nonimmediate_operand" "")
  	(reg:DI 27))]
!   "! TARGET_ABI_OPEN_VMS"
    "")
  
  (define_expand "moddi3"
***************
*** 1067,1073 ****
  	      (clobber (reg:DI 28))])
     (set (match_operand:DI 0 "nonimmediate_operand" "")
  	(reg:DI 27))]
!   "!TARGET_OPEN_VMS"
    "")
  
  (define_expand "umoddi3"
--- 1067,1073 ----
  	      (clobber (reg:DI 28))])
     (set (match_operand:DI 0 "nonimmediate_operand" "")
  	(reg:DI 27))]
!   "! TARGET_ABI_OPEN_VMS"
    "")
  
  (define_expand "umoddi3"
***************
*** 1080,1086 ****
  	      (clobber (reg:DI 28))])
     (set (match_operand:DI 0 "nonimmediate_operand" "")
  	(reg:DI 27))]
!   "!TARGET_OPEN_VMS"
    "")
  
  ;; Lengths of 8 for ldq $t12,__divq($gp); jsr $t9,($t12),__divq as
--- 1080,1086 ----
  	      (clobber (reg:DI 28))])
     (set (match_operand:DI 0 "nonimmediate_operand" "")
  	(reg:DI 27))]
!   "! TARGET_ABI_OPEN_VMS"
    "")
  
  ;; Lengths of 8 for ldq $t12,__divq($gp); jsr $t9,($t12),__divq as
***************
*** 1091,1097 ****
  			[(reg:DI 24) (reg:DI 25)])))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
!   "!TARGET_OPEN_VMS"
    "%E0 $24,$25,$27"
    [(set_attr "type" "jsr")
     (set_attr "length" "8")])
--- 1091,1097 ----
  			[(reg:DI 24) (reg:DI 25)])))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
!   "! TARGET_ABI_OPEN_VMS"
    "%E0 $24,$25,$27"
    [(set_attr "type" "jsr")
     (set_attr "length" "8")])
***************
*** 1102,1108 ****
  			[(reg:DI 24) (reg:DI 25)]))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
!   "!TARGET_OPEN_VMS"
    "%E0 $24,$25,$27"
    [(set_attr "type" "jsr")
     (set_attr "length" "8")])
--- 1102,1108 ----
  			[(reg:DI 24) (reg:DI 25)]))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
!   "! TARGET_ABI_OPEN_VMS"
    "%E0 $24,$25,$27"
    [(set_attr "type" "jsr")
     (set_attr "length" "8")])
***************
*** 1212,1218 ****
    if (! TARGET_BWX)
      operands[1] = force_reg (QImode, operands[1]);
  }")
!   
  (define_insn "*zero_extendqidi2_bwx"
    [(set (match_operand:DI 0 "register_operand" "=r,r")
  	(zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
--- 1212,1218 ----
    if (! TARGET_BWX)
      operands[1] = force_reg (QImode, operands[1]);
  }")
! 
  (define_insn "*zero_extendqidi2_bwx"
    [(set (match_operand:DI 0 "register_operand" "=r,r")
  	(zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
***************
*** 1228,1234 ****
    "! TARGET_BWX"
    "and %1,0xff,%0"
    [(set_attr "type" "ilog")])
!   
  (define_expand "zero_extendhisi2"
    [(set (match_operand:SI 0 "register_operand" "")
  	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))]
--- 1228,1234 ----
    "! TARGET_BWX"
    "and %1,0xff,%0"
    [(set_attr "type" "ilog")])
! 
  (define_expand "zero_extendhisi2"
    [(set (match_operand:SI 0 "register_operand" "")
  	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))]
***************
*** 1339,1345 ****
    "eqv %r1,%2,%0"
    [(set_attr "type" "ilog")])
  
! ;; Handle the FFS insn iff we support CIX. 
  
  (define_expand "ffsdi2"
    [(set (match_dup 2)
--- 1339,1345 ----
    "eqv %r1,%2,%0"
    [(set_attr "type" "ilog")])
  
! ;; Handle the FFS insn iff we support CIX.
  
  (define_expand "ffsdi2"
    [(set (match_dup 2)
***************
*** 1361,1367 ****
  	(unspec:DI [(match_operand:DI 1 "register_operand" "r")] UNSPEC_CTTZ))]
    "TARGET_CIX"
    "cttz %1,%0"
!   ; EV6 calls all mvi and cttz/ctlz/popc class imisc, so just 
    ; reuse the existing type name.
    [(set_attr "type" "mvi")])
  
--- 1361,1367 ----
  	(unspec:DI [(match_operand:DI 1 "register_operand" "r")] UNSPEC_CTTZ))]
    "TARGET_CIX"
    "cttz %1,%0"
!   ; EV6 calls all mvi and cttz/ctlz/popc class imisc, so just
    ; reuse the existing type name.
    [(set_attr "type" "mvi")])
  
***************
*** 1407,1413 ****
  ;;    return \"s%P2addl %r1,0,%0\";
  ;; }"
  ;;  [(set_attr "type" "iadd")])
! 			  
  (define_insn "lshrdi3"
    [(set (match_operand:DI 0 "register_operand" "=r")
  	(lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
--- 1407,1413 ----
  ;;    return \"s%P2addl %r1,0,%0\";
  ;; }"
  ;;  [(set_attr "type" "iadd")])
! 
  (define_insn "lshrdi3"
    [(set (match_operand:DI 0 "register_operand" "=r")
  	(lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
***************
*** 1440,1446 ****
  				   force_reg (QImode, operands[1])));
        DONE;
      }
!  
   /* If we have an unaligned MEM, extend to DImode (which we do
       specially) and then copy to the result.  */
    if (unaligned_memory_operand (operands[1], HImode))
--- 1440,1446 ----
  				   force_reg (QImode, operands[1])));
        DONE;
      }
! 
   /* If we have an unaligned MEM, extend to DImode (which we do
       specially) and then copy to the result.  */
    if (unaligned_memory_operand (operands[1], HImode))
***************
*** 1687,1693 ****
    [(set_attr "type" "shift")])
  
  ;; Combine has some strange notion of preserving existing undefined behaviour
! ;; in shifts larger than a word size.  So capture these patterns that it 
  ;; should have turned into zero_extracts.
  
  (define_insn "*extxl_1"
--- 1687,1693 ----
    [(set_attr "type" "shift")])
  
  ;; Combine has some strange notion of preserving existing undefined behaviour
! ;; in shifts larger than a word size.  So capture these patterns that it
  ;; should have turned into zero_extracts.
  
  (define_insn "*extxl_1"
***************
*** 1774,1784 ****
  ;;		   (match_dup 4)))]
  ;;  "
  ;;{
! ;;  operands[6] = plus_constant (operands[3], 
  ;;			       INTVAL (operands[2]) / BITS_PER_UNIT);
  ;;  operands[7] = GEN_INT (- INTVAL (operands[2]) / BITS_PER_UNIT);
  ;;}")
!   
  (define_insn "*insbl_const"
    [(set (match_operand:DI 0 "register_operand" "=r")
  	(ashift:DI (zero_extend:DI (match_operand:QI 1 "register_operand" "r"))
--- 1774,1784 ----
  ;;		   (match_dup 4)))]
  ;;  "
  ;;{
! ;;  operands[6] = plus_constant (operands[3],
  ;;			       INTVAL (operands[2]) / BITS_PER_UNIT);
  ;;  operands[7] = GEN_INT (- INTVAL (operands[2]) / BITS_PER_UNIT);
  ;;}")
! 
  (define_insn "*insbl_const"
    [(set (match_operand:DI 0 "register_operand" "=r")
  	(ashift:DI (zero_extend:DI (match_operand:QI 1 "register_operand" "r"))
***************
*** 2353,2359 ****
       bit at bit 48 of the fraction, which is representable in DFmode,
       which prevents rounding error in the final conversion to SFmode.  */
  
!   emit_insn (gen_rtx_SET (VOIDmode, sticky, 
  			  gen_rtx_NE (DImode, lo, const0_rtx)));
    emit_insn (gen_iordi3 (hi, hi, sticky));
    emit_insn (gen_trunctfdf2 (tmpf, arg));
--- 2353,2359 ----
       bit at bit 48 of the fraction, which is representable in DFmode,
       which prevents rounding error in the final conversion to SFmode.  */
  
!   emit_insn (gen_rtx_SET (VOIDmode, sticky,
  			  gen_rtx_NE (DImode, lo, const0_rtx)));
    emit_insn (gen_iordi3 (hi, hi, sticky));
    emit_insn (gen_trunctfdf2 (tmpf, arg));
***************
*** 3039,3045 ****
    [(set_attr "type" "icmov")])
  
  (define_expand "umaxdi3"
!   [(set (match_dup 3) 
  	(leu:DI (match_operand:DI 1 "reg_or_0_operand" "")
  		(match_operand:DI 2 "reg_or_8bit_operand" "")))
     (set (match_operand:DI 0 "register_operand" "")
--- 3039,3045 ----
    [(set_attr "type" "icmov")])
  
  (define_expand "umaxdi3"
!   [(set (match_dup 3)
  	(leu:DI (match_operand:DI 1 "reg_or_0_operand" "")
  		(match_operand:DI 2 "reg_or_8bit_operand" "")))
     (set (match_operand:DI 0 "register_operand" "")
***************
*** 3250,3256 ****
  
  (define_insn "*movdfcc_internal"
    [(set (match_operand:DF 0 "register_operand" "=f,f")
! 	(if_then_else:DF 
  	 (match_operator 3 "signed_comparison_operator"
  			 [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
  			  (match_operand:DF 2 "fp0_operand" "G,G")])
--- 3250,3256 ----
  
  (define_insn "*movdfcc_internal"
    [(set (match_operand:DF 0 "register_operand" "=f,f")
! 	(if_then_else:DF
  	 (match_operator 3 "signed_comparison_operator"
  			 [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
  			  (match_operand:DF 2 "fp0_operand" "G,G")])
***************
*** 3264,3270 ****
  
  (define_insn "*movsfcc_internal"
    [(set (match_operand:SF 0 "register_operand" "=f,f")
! 	(if_then_else:SF 
  	 (match_operator 3 "signed_comparison_operator"
  			 [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
  			  (match_operand:DF 2 "fp0_operand" "G,G")])
--- 3264,3270 ----
  
  (define_insn "*movsfcc_internal"
    [(set (match_operand:SF 0 "register_operand" "=f,f")
! 	(if_then_else:SF
  	 (match_operator 3 "signed_comparison_operator"
  			 [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
  			  (match_operand:DF 2 "fp0_operand" "G,G")])
***************
*** 3278,3284 ****
  
  (define_insn "*movdfcc_ext1"
    [(set (match_operand:DF 0 "register_operand" "=f,f")
! 	(if_then_else:DF 
  	 (match_operator 3 "signed_comparison_operator"
  			 [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
  			  (match_operand:DF 2 "fp0_operand" "G,G")])
--- 3278,3284 ----
  
  (define_insn "*movdfcc_ext1"
    [(set (match_operand:DF 0 "register_operand" "=f,f")
! 	(if_then_else:DF
  	 (match_operator 3 "signed_comparison_operator"
  			 [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
  			  (match_operand:DF 2 "fp0_operand" "G,G")])
***************
*** 3292,3300 ****
  
  (define_insn "*movdfcc_ext2"
    [(set (match_operand:DF 0 "register_operand" "=f,f")
! 	(if_then_else:DF 
  	 (match_operator 3 "signed_comparison_operator"
! 			 [(float_extend:DF 
  			   (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
  			  (match_operand:DF 2 "fp0_operand" "G,G")])
  	 (match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
--- 3292,3300 ----
  
  (define_insn "*movdfcc_ext2"
    [(set (match_operand:DF 0 "register_operand" "=f,f")
! 	(if_then_else:DF
  	 (match_operator 3 "signed_comparison_operator"
! 			 [(float_extend:DF
  			   (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
  			  (match_operand:DF 2 "fp0_operand" "G,G")])
  	 (match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
***************
*** 3307,3313 ****
  
  (define_insn "*movdfcc_ext3"
    [(set (match_operand:SF 0 "register_operand" "=f,f")
! 	(if_then_else:SF 
  	 (match_operator 3 "signed_comparison_operator"
  			 [(float_extend:DF
  			   (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
--- 3307,3313 ----
  
  (define_insn "*movdfcc_ext3"
    [(set (match_operand:SF 0 "register_operand" "=f,f")
! 	(if_then_else:SF
  	 (match_operator 3 "signed_comparison_operator"
  			 [(float_extend:DF
  			   (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
***************
*** 3322,3328 ****
  
  (define_insn "*movdfcc_ext4"
    [(set (match_operand:DF 0 "register_operand" "=f,f")
! 	(if_then_else:DF 
  	 (match_operator 3 "signed_comparison_operator"
  			 [(float_extend:DF
  			   (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
--- 3322,3328 ----
  
  (define_insn "*movdfcc_ext4"
    [(set (match_operand:DF 0 "register_operand" "=f,f")
! 	(if_then_else:DF
  	 (match_operator 3 "signed_comparison_operator"
  			 [(float_extend:DF
  			   (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
***************
*** 3766,3772 ****
         && ! (extended_count (operands[2], DImode, unsignedp) >= 1
  	     && extended_count (operands[3], DImode, unsignedp) >= 1)))
      FAIL;
!  
    if (GET_CODE (operands[3]) == CONST_INT)
      tem = gen_rtx_PLUS (SImode, operands[2],
  			GEN_INT (- INTVAL (operands[3])));
--- 3766,3772 ----
         && ! (extended_count (operands[2], DImode, unsignedp) >= 1
  	     && extended_count (operands[3], DImode, unsignedp) >= 1)))
      FAIL;
! 
    if (GET_CODE (operands[3]) == CONST_INT)
      tem = gen_rtx_PLUS (SImode, operands[2],
  			GEN_INT (- INTVAL (operands[3])));
***************
*** 3842,3848 ****
  			GEN_INT (- INTVAL (operands[3])));
    else
      tem = gen_rtx_MINUS (SImode, operands[2], operands[3]);
!   
    operands[5] = gen_rtx_SIGN_EXTEND (DImode, tem);
    operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[1]), VOIDmode,
  				operands[4], const0_rtx);
--- 3842,3848 ----
  			GEN_INT (- INTVAL (operands[3])));
    else
      tem = gen_rtx_MINUS (SImode, operands[2], operands[3]);
! 
    operands[5] = gen_rtx_SIGN_EXTEND (DImode, tem);
    operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[1]), VOIDmode,
  				operands[4], const0_rtx);
***************
*** 4082,4090 ****
     (use (match_operand 3 "" ""))]
    ""
    "
! { if (TARGET_WINDOWS_NT)
      emit_call_insn (gen_call_nt (operands[0], operands[1]));
!   else if (TARGET_OPEN_VMS)
      emit_call_insn (gen_call_vms (operands[0], operands[2]));
    else
      emit_call_insn (gen_call_osf (operands[0], operands[1]));
--- 4082,4090 ----
     (use (match_operand 3 "" ""))]
    ""
    "
! { if (TARGET_ABI_WINDOWS_NT)
      emit_call_insn (gen_call_nt (operands[0], operands[1]));
!   else if (TARGET_ABI_OPEN_VMS)
      emit_call_insn (gen_call_vms (operands[0], operands[2]));
    else
      emit_call_insn (gen_call_osf (operands[0], operands[1]));
***************
*** 4095,4101 ****
  (define_expand "sibcall"
    [(call (mem:DI (match_operand 0 "" ""))
  		 (match_operand 1 "" ""))]
!   "!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT"
    "
  {
    if (GET_CODE (operands[0]) != MEM)
--- 4095,4101 ----
  (define_expand "sibcall"
    [(call (mem:DI (match_operand 0 "" ""))
  		 (match_operand 1 "" ""))]
!   "TARGET_ABI_OSF"
    "
  {
    if (GET_CODE (operands[0]) != MEM)
***************
*** 4187,4195 ****
     (use (match_operand 4 "" ""))]
    ""
    "
! { if (TARGET_WINDOWS_NT)
      emit_call_insn (gen_call_value_nt (operands[0], operands[1], operands[2]));
!   else if (TARGET_OPEN_VMS)
      emit_call_insn (gen_call_value_vms (operands[0], operands[1],
  					operands[3]));
    else
--- 4187,4196 ----
     (use (match_operand 4 "" ""))]
    ""
    "
! {
!   if (TARGET_ABI_WINDOWS_NT)
      emit_call_insn (gen_call_value_nt (operands[0], operands[1], operands[2]));
!   else if (TARGET_ABI_OPEN_VMS)
      emit_call_insn (gen_call_value_vms (operands[0], operands[1],
  					operands[3]));
    else
***************
*** 4202,4208 ****
    [(set (match_operand 0 "" "")
  	(call (mem:DI (match_operand 1 "" ""))
  	      (match_operand 2 "" "")))]
!   "!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT"
    "
  {
    if (GET_CODE (operands[1]) != MEM)
--- 4203,4209 ----
    [(set (match_operand 0 "" "")
  	(call (mem:DI (match_operand 1 "" ""))
  	      (match_operand 2 "" "")))]
!   "TARGET_ABI_OSF"
    "
  {
    if (GET_CODE (operands[1]) != MEM)
***************
*** 4288,4319 ****
  	 (match_operand 1 "" ""))
     (clobber (reg:DI 27))
     (clobber (reg:DI 26))]
!   "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS
!    && find_reg_note (insn, REG_NORETURN, NULL_RTX)"
    "@
     jsr $26,($27),0
     bsr $26,$%0..ng
     jsr $26,%0"
    [(set_attr "type" "jsr")
     (set_attr "length" "*,*,8")])
!       
  (define_insn "*call_osf_1"
    [(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,i"))
  	 (match_operand 1 "" ""))
     (clobber (reg:DI 27))
     (clobber (reg:DI 26))]
!   "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS"
    "@
     jsr $26,($27),0\;ldgp $29,0($26)
     bsr $26,$%0..ng
     jsr $26,%0\;ldgp $29,0($26)"
    [(set_attr "type" "jsr")
     (set_attr "length" "12,*,16")])
!       
  (define_insn "*sibcall_osf_1"
    [(call (mem:DI (match_operand:DI 0 "call_operand" "R,i"))
  	 (match_operand 1 "" ""))]
!   "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS"
    "@
     br $31,$%0..ng
     jmp $31,%0"
--- 4289,4319 ----
  	 (match_operand 1 "" ""))
     (clobber (reg:DI 27))
     (clobber (reg:DI 26))]
!   "TARGET_ABI_OSF && find_reg_note (insn, REG_NORETURN, NULL_RTX)"
    "@
     jsr $26,($27),0
     bsr $26,$%0..ng
     jsr $26,%0"
    [(set_attr "type" "jsr")
     (set_attr "length" "*,*,8")])
! 
  (define_insn "*call_osf_1"
    [(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,i"))
  	 (match_operand 1 "" ""))
     (clobber (reg:DI 27))
     (clobber (reg:DI 26))]
!   "TARGET_ABI_OSF"
    "@
     jsr $26,($27),0\;ldgp $29,0($26)
     bsr $26,$%0..ng
     jsr $26,%0\;ldgp $29,0($26)"
    [(set_attr "type" "jsr")
     (set_attr "length" "12,*,16")])
! 
  (define_insn "*sibcall_osf_1"
    [(call (mem:DI (match_operand:DI 0 "call_operand" "R,i"))
  	 (match_operand 1 "" ""))]
!   "TARGET_ABI_OSF"
    "@
     br $31,$%0..ng
     jmp $31,%0"
***************
*** 4324,4337 ****
    [(call (mem:DI (match_operand:DI 0 "call_operand" "r,R,i"))
  	 (match_operand 1 "" ""))
     (clobber (reg:DI 26))]
!   "TARGET_WINDOWS_NT"
    "@
     jsr $26,(%0)
     bsr $26,%0
     jsr $26,%0"
    [(set_attr "type" "jsr")
     (set_attr "length" "*,*,12")])
!       
  (define_insn "*call_vms_1"
    [(call (mem:DI (match_operand:DI 0 "call_operand" "r,i"))
  	 (match_operand 1 "" ""))
--- 4324,4337 ----
    [(call (mem:DI (match_operand:DI 0 "call_operand" "r,R,i"))
  	 (match_operand 1 "" ""))
     (clobber (reg:DI 26))]
!   "TARGET_ABI_WINDOWS_NT"
    "@
     jsr $26,(%0)
     bsr $26,%0
     jsr $26,%0"
    [(set_attr "type" "jsr")
     (set_attr "length" "*,*,12")])
! 
  (define_insn "*call_vms_1"
    [(call (mem:DI (match_operand:DI 0 "call_operand" "r,i"))
  	 (match_operand 1 "" ""))
***************
*** 4339,4345 ****
     (use (reg:DI 25))
     (use (reg:DI 26))
     (clobber (reg:DI 27))]
!   "TARGET_OPEN_VMS"
    "@
     mov %2,$27\;jsr $26,0\;ldq $27,0($29)
     ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)"
--- 4339,4345 ----
     (use (reg:DI 25))
     (use (reg:DI 26))
     (clobber (reg:DI 27))]
!   "TARGET_ABI_OPEN_VMS"
    "@
     mov %2,$27\;jsr $26,0\;ldq $27,0($29)
     ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)"
***************
*** 4414,4422 ****
    ""
    "
  {
!   if (TARGET_WINDOWS_NT)
      emit_jump_insn (gen_tablejump_nt (operands[0], operands[1]));
!   else if (TARGET_OPEN_VMS)
      emit_jump_insn (gen_tablejump_vms (operands[0], operands[1]));
    else
      emit_jump_insn (gen_tablejump_osf (operands[0], operands[1]));
--- 4414,4422 ----
    ""
    "
  {
!   if (TARGET_ABI_WINDOWS_NT)
      emit_jump_insn (gen_tablejump_nt (operands[0], operands[1]));
!   else if (TARGET_ABI_OPEN_VMS)
      emit_jump_insn (gen_tablejump_vms (operands[0], operands[1]));
    else
      emit_jump_insn (gen_tablejump_osf (operands[0], operands[1]));
***************
*** 4465,4471 ****
  	(plus (match_operand:DI 0 "register_operand" "r")
  	      (label_ref (match_operand 1 "" ""))))
     (clobber (match_scratch:DI 2 "=r"))]
!   "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS && next_active_insn (insn) != 0
     && GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
     && PREV_INSN (next_active_insn (insn)) == operands[1]"
    "*
--- 4465,4471 ----
  	(plus (match_operand:DI 0 "register_operand" "r")
  	      (label_ref (match_operand 1 "" ""))))
     (clobber (match_scratch:DI 2 "=r"))]
!   "TARGET_ABI_OSF && next_active_insn (insn) != 0
     && GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
     && PREV_INSN (next_active_insn (insn)) == operands[1]"
    "*
***************
*** 4509,4515 ****
    [(set (pc)
  	(match_operand:DI 0 "register_operand" "r"))
     (use (label_ref (match_operand 1 "" "")))]
!   "TARGET_WINDOWS_NT && next_active_insn (insn) != 0
     && GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
     && PREV_INSN (next_active_insn (insn)) == operands[1]"
    "*
--- 4509,4515 ----
    [(set (pc)
  	(match_operand:DI 0 "register_operand" "r"))
     (use (label_ref (match_operand 1 "" "")))]
!   "TARGET_ABI_WINDOWS_NT && next_active_insn (insn) != 0
     && GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
     && PREV_INSN (next_active_insn (insn)) == operands[1]"
    "*
***************
*** 4557,4563 ****
    [(set (pc)
  	(plus (match_operand:DI 0 "register_operand" "r")
  	      (label_ref (match_operand 1 "" ""))))]
!   "TARGET_OPEN_VMS"
    "jmp $31,(%0),0"
    [(set_attr "type" "ibr")])
  
--- 4557,4563 ----
    [(set (pc)
  	(plus (match_operand:DI 0 "register_operand" "r")
  	      (label_ref (match_operand 1 "" ""))))]
!   "TARGET_ABI_OPEN_VMS"
    "jmp $31,(%0),0"
    [(set_attr "type" "ibr")])
  
***************
*** 4724,4730 ****
  (define_insn "*movsi_nofix"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m")
  	(match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f"))]
!   "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS && ! TARGET_FIX
     && (register_operand (operands[0], SImode)
         || reg_or_0_operand (operands[1], SImode))"
    "@
--- 4724,4730 ----
  (define_insn "*movsi_nofix"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m")
  	(match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f"))]
!   "TARGET_ABI_OSF && ! TARGET_FIX
     && (register_operand (operands[0], SImode)
         || reg_or_0_operand (operands[1], SImode))"
    "@
***************
*** 4741,4747 ****
  (define_insn "*movsi_fix"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m,r,*f")
  	(match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f,*f,r"))]
!   "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS && TARGET_FIX
     && (register_operand (operands[0], SImode)
         || reg_or_0_operand (operands[1], SImode))"
    "@
--- 4741,4747 ----
  (define_insn "*movsi_fix"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m,r,*f")
  	(match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f,*f,r"))]
!   "TARGET_ABI_OSF && TARGET_FIX
     && (register_operand (operands[0], SImode)
         || reg_or_0_operand (operands[1], SImode))"
    "@
***************
*** 4760,4766 ****
  (define_insn "*movsi_nt_vms"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m,*f,*f,m")
  	(match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ,*fJ,m,*f"))]
!   "(TARGET_WINDOWS_NT || TARGET_OPEN_VMS)
      && (register_operand (operands[0], SImode)
          || reg_or_0_operand (operands[1], SImode))"
    "@
--- 4760,4766 ----
  (define_insn "*movsi_nt_vms"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m,*f,*f,m")
  	(match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ,*fJ,m,*f"))]
!   "(TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS)
      && (register_operand (operands[0], SImode)
          || reg_or_0_operand (operands[1], SImode))"
    "@
***************
*** 4953,4959 ****
  	    }
  	  else
  	    abort();
! 	  
            tem = alpha_emit_set_long_const (operands[0], i0, i1);
            if (rtx_equal_p (tem, operands[0]))
  	    DONE;
--- 4953,4959 ----
  	    }
  	  else
  	    abort();
! 
            tem = alpha_emit_set_long_const (operands[0], i0, i1);
            if (rtx_equal_p (tem, operands[0]))
  	    DONE;
***************
*** 5012,5021 ****
  	(zero_extract:DI (subreg:DI (match_dup 3) 0)
  			 (const_int 8)
  			 (match_operand:DI 2 "const_int_operand" "")))]
! 	 
    ""
    "")
!   
  (define_expand "aligned_loadhi"
    [(set (match_operand:SI 3 "register_operand" "")
  	(match_operand:SI 1 "memory_operand" ""))
--- 5012,5021 ----
  	(zero_extract:DI (subreg:DI (match_dup 3) 0)
  			 (const_int 8)
  			 (match_operand:DI 2 "const_int_operand" "")))]
! 
    ""
    "")
! 
  (define_expand "aligned_loadhi"
    [(set (match_operand:SI 3 "register_operand" "")
  	(match_operand:SI 1 "memory_operand" ""))
***************
*** 5023,5032 ****
  	(zero_extract:DI (subreg:DI (match_dup 3) 0)
  			 (const_int 16)
  			 (match_operand:DI 2 "const_int_operand" "")))]
! 	 
    ""
    "")
!   
  ;; Similar for unaligned loads, where we use the sequence from the
  ;; Alpha Architecture manual.
  ;;
--- 5023,5032 ----
  	(zero_extract:DI (subreg:DI (match_dup 3) 0)
  			 (const_int 16)
  			 (match_operand:DI 2 "const_int_operand" "")))]
! 
    ""
    "")
! 
  ;; Similar for unaligned loads, where we use the sequence from the
  ;; Alpha Architecture manual.
  ;;
***************
*** 5060,5066 ****
    "")
  
  ;; Storing an aligned byte or word requires two temporaries.  Operand 0 is the
! ;; aligned SImode MEM.  Operand 1 is the register containing the 
  ;; byte or word to store.  Operand 2 is the number of bits within the word that
  ;; the value should be placed.  Operands 3 and 4 are SImode temporaries.
  
--- 5060,5066 ----
    "")
  
  ;; Storing an aligned byte or word requires two temporaries.  Operand 0 is the
! ;; aligned SImode MEM.  Operand 1 is the register containing the
  ;; byte or word to store.  Operand 2 is the number of bits within the word that
  ;; the value should be placed.  Operands 3 and 4 are SImode temporaries.
  
***************
*** 5212,5218 ****
      }
  
    else if (GET_CODE (operands[0]) == MEM
! 	   || (GET_CODE (operands[0]) == SUBREG 
  	       && GET_CODE (SUBREG_REG (operands[0])) == MEM)
  	   || (reload_in_progress && GET_CODE (operands[0]) == REG
  	       && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
--- 5212,5218 ----
      }
  
    else if (GET_CODE (operands[0]) == MEM
! 	   || (GET_CODE (operands[0]) == SUBREG
  	       && GET_CODE (SUBREG_REG (operands[0])) == MEM)
  	   || (reload_in_progress && GET_CODE (operands[0]) == REG
  	       && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
***************
*** 5330,5336 ****
      }
  
    else if (GET_CODE (operands[0]) == MEM
! 	   || (GET_CODE (operands[0]) == SUBREG 
  	       && GET_CODE (SUBREG_REG (operands[0])) == MEM)
  	   || (reload_in_progress && GET_CODE (operands[0]) == REG
  	       && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
--- 5330,5336 ----
      }
  
    else if (GET_CODE (operands[0]) == MEM
! 	   || (GET_CODE (operands[0]) == SUBREG
  	       && GET_CODE (SUBREG_REG (operands[0])) == MEM)
  	   || (reload_in_progress && GET_CODE (operands[0]) == REG
  	       && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
***************
*** 5423,5429 ****
  
    if (aligned_memory_operand (operands[1], HImode))
      {
!       seq = gen_reload_inhi_help (operands[0], operands[1], 
  				  gen_rtx_REG (SImode, REGNO (operands[2])));
      }
    else
--- 5423,5429 ----
  
    if (aligned_memory_operand (operands[1], HImode))
      {
!       seq = gen_reload_inhi_help (operands[0], operands[1],
  				  gen_rtx_REG (SImode, REGNO (operands[2])));
      }
    else
***************
*** 5567,5573 ****
  				 operands[2]));
    DONE;
  }")
!   
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
          (match_operand:HI 1 "memory_operand" ""))
--- 5567,5573 ----
  				 operands[2]));
    DONE;
  }")
! 
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
          (match_operand:HI 1 "memory_operand" ""))
***************
*** 5582,5588 ****
  				 operands[2]));
    DONE;
  }")
!   
  (define_split
    [(set (match_operand:QI 0 "memory_operand" "")
          (match_operand:QI 1 "register_operand" ""))
--- 5582,5588 ----
  				 operands[2]));
    DONE;
  }")
! 
  (define_split
    [(set (match_operand:QI 0 "memory_operand" "")
          (match_operand:QI 1 "register_operand" ""))
***************
*** 5750,5756 ****
  ;; bytes, we need do nothing.
  ;;
  ;; If it is more than 4096 bytes, we need to probe the stack
! ;; periodically. 
  (define_expand "allocate_stack"
    [(set (reg:DI 30)
  	(plus:DI (reg:DI 30)
--- 5750,5756 ----
  ;; bytes, we need do nothing.
  ;;
  ;; If it is more than 4096 bytes, we need to probe the stack
! ;; periodically.
  (define_expand "allocate_stack"
    [(set (reg:DI 30)
  	(plus:DI (reg:DI 30)
***************
*** 5901,5907 ****
  
  (define_expand "sibcall_epilogue"
    [(return)]
!   "!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT"
    "
  {
    alpha_expand_epilogue ();
--- 5901,5907 ----
  
  (define_expand "sibcall_epilogue"
    [(return)]
!   "TARGET_ABI_OSF"
    "
  {
    alpha_expand_epilogue ();
***************
*** 5921,5927 ****
  
  (define_expand "builtin_longjmp"
    [(use (match_operand:DI 0 "register_operand" "r"))]
!   "! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT"
    "
  {
    /* The elements of the buffer are, in order:  */
--- 5921,5927 ----
  
  (define_expand "builtin_longjmp"
    [(use (match_operand:DI 0 "register_operand" "r"))]
!   "TARGET_ABI_OSF"
    "
  {
    /* The elements of the buffer are, in order:  */
***************
*** 5957,5977 ****
  
  (define_insn "*builtin_setjmp_receiver_sub_label"
    [(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)]
!   "! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT && TARGET_AS_CAN_SUBTRACT_LABELS"
    "\\n$LSJ%=:\;ldgp $29,$LSJ%=-%l0($27)"
    [(set_attr "length" "8")
     (set_attr "type" "multi")])
  
  (define_insn "builtin_setjmp_receiver"
    [(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)]
!   "! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT"
    "br $29,$LSJ%=\\n$LSJ%=:\;ldgp $29,0($29)"
    [(set_attr "length" "12")
     (set_attr "type" "multi")])
  
  (define_expand "exception_receiver"
    [(unspec_volatile [(match_dup 0)] UNSPECV_EHR)]
!   "! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT"
    "
  {
    if (TARGET_LD_BUGGY_LDGP)
--- 5957,5977 ----
  
  (define_insn "*builtin_setjmp_receiver_sub_label"
    [(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)]
!   "TARGET_ABI_OSF && TARGET_AS_CAN_SUBTRACT_LABELS"
    "\\n$LSJ%=:\;ldgp $29,$LSJ%=-%l0($27)"
    [(set_attr "length" "8")
     (set_attr "type" "multi")])
  
  (define_insn "builtin_setjmp_receiver"
    [(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)]
!   "TARGET_ABI_OSF"
    "br $29,$LSJ%=\\n$LSJ%=:\;ldgp $29,0($29)"
    [(set_attr "length" "12")
     (set_attr "type" "multi")])
  
  (define_expand "exception_receiver"
    [(unspec_volatile [(match_dup 0)] UNSPECV_EHR)]
!   "TARGET_ABI_OSF"
    "
  {
    if (TARGET_LD_BUGGY_LDGP)
***************
*** 6005,6011 ****
     (set (reg:DI 27) (mem:DI (reg:DI 29)))
     (unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)
     (use (reg:DI 27))]
!   "TARGET_OPEN_VMS"
    "")
  
  (define_insn "arg_home"
--- 6005,6011 ----
     (set (reg:DI 27) (mem:DI (reg:DI 29)))
     (unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)
     (use (reg:DI 27))]
!   "TARGET_ABI_OPEN_VMS"
    "")
  
  (define_insn "arg_home"
***************
*** 6028,6034 ****
     (clobber (reg:DI 24))
     (clobber (reg:DI 25))
     (clobber (reg:DI 0))]
!   "TARGET_OPEN_VMS"
    "lda $0,OTS$HOME_ARGS\;ldq $0,8($0)\;jsr $0,OTS$HOME_ARGS"
    [(set_attr "length" "16")
     (set_attr "type" "multi")])
--- 6028,6034 ----
     (clobber (reg:DI 24))
     (clobber (reg:DI 25))
     (clobber (reg:DI 0))]
!   "TARGET_ABI_OPEN_VMS"
    "lda $0,OTS$HOME_ARGS\;ldq $0,8($0)\;jsr $0,OTS$HOME_ARGS"
    [(set_attr "length" "16")
     (set_attr "type" "multi")])
***************
*** 6077,6083 ****
  	      (match_operand 2 "" "")))
     (clobber (reg:DI 27))
     (clobber (reg:DI 26))]
!   "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS"
    "@
     jsr $26,($27),0\;ldgp $29,0($26)
     bsr $26,$%1..ng
--- 6077,6083 ----
  	      (match_operand 2 "" "")))
     (clobber (reg:DI 27))
     (clobber (reg:DI 26))]
!   "TARGET_ABI_OSF"
    "@
     jsr $26,($27),0\;ldgp $29,0($26)
     bsr $26,$%1..ng
***************
*** 6089,6095 ****
    [(set (match_operand 0 "" "")
  	(call (mem:DI (match_operand:DI 1 "call_operand" "R,i"))
  	      (match_operand 2 "" "")))]
!   "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS"
    "@
     br $31,$%1..ng
     jmp $31,%1"
--- 6089,6095 ----
    [(set (match_operand 0 "" "")
  	(call (mem:DI (match_operand:DI 1 "call_operand" "R,i"))
  	      (match_operand 2 "" "")))]
!   "TARGET_ABI_OSF"
    "@
     br $31,$%1..ng
     jmp $31,%1"
***************
*** 6101,6107 ****
  	(call (mem:DI (match_operand:DI 1 "call_operand" "r,R,i"))
  	      (match_operand 2 "" "")))
     (clobber (reg:DI 26))]
!   "TARGET_WINDOWS_NT"
    "@
     jsr $26,(%1)
     bsr $26,%1
--- 6101,6107 ----
  	(call (mem:DI (match_operand:DI 1 "call_operand" "r,R,i"))
  	      (match_operand 2 "" "")))
     (clobber (reg:DI 26))]
!   "TARGET_ABI_WINDOWS_NT"
    "@
     jsr $26,(%1)
     bsr $26,%1
***************
*** 6117,6123 ****
     (use (reg:DI 25))
     (use (reg:DI 26))
     (clobber (reg:DI 27))]
!   "TARGET_OPEN_VMS"
    "@
     mov %3,$27\;jsr $26,0\;ldq $27,0($29)
     ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)"
--- 6117,6123 ----
     (use (reg:DI 25))
     (use (reg:DI 26))
     (clobber (reg:DI 27))]
!   "TARGET_ABI_OPEN_VMS"
    "@
     mov %3,$27\;jsr $26,0\;ldq $27,0($29)
     ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)"
Index: alpha32.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/alpha/alpha32.h,v
retrieving revision 1.4
diff -c -p -d -r1.4 alpha32.h
*** alpha32.h	2000/12/01 00:32:12	1.4
--- alpha32.h	2001/07/15 07:08:58
*************** along with GNU CC; see the file COPYING.
*** 30,37 ****
  the Free Software Foundation, 59 Temple Place - Suite 330,
  Boston, MA 02111-1307, USA.  */
  
! #undef TARGET_WINDOWS_NT
! #define TARGET_WINDOWS_NT 1
  
  /* WinNT (and thus Interix) use unsigned int */
  #define SIZE_TYPE "unsigned int"
--- 30,37 ----
  the Free Software Foundation, 59 Temple Place - Suite 330,
  Boston, MA 02111-1307, USA.  */
  
! #undef TARGET_ABI_WINDOWS_NT
! #define TARGET_ABI_WINDOWS_NT 1
  
  /* WinNT (and thus Interix) use unsigned int */
  #define SIZE_TYPE "unsigned int"
Index: vms.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/alpha/vms.h,v
retrieving revision 1.33
diff -c -p -d -r1.33 vms.h
*** vms.h	2001/07/07 06:52:34	1.33
--- vms.h	2001/07/15 07:08:59
*************** along with GNU CC; see the file COPYING.
*** 18,25 ****
  the Free Software Foundation, 59 Temple Place - Suite 330,
  Boston, MA 02111-1307, USA.  */
  
- #define OPEN_VMS 1
- 
  #define TARGET_OBJECT_SUFFIX ".obj"
  #define TARGET_EXECUTABLE_SUFFIX ".exe"
  
--- 18,23 ----
*************** Boston, MA 02111-1307, USA.  */
*** 69,76 ****
  
  #undef TARGET_DEFAULT
  #define TARGET_DEFAULT (MASK_FP|MASK_FPREGS|MASK_GAS)
! #undef TARGET_OPEN_VMS
! #define TARGET_OPEN_VMS 1
  
  #undef TARGET_NAME   
  #define TARGET_NAME "OpenVMS/Alpha"
--- 67,74 ----
  
  #undef TARGET_DEFAULT
  #define TARGET_DEFAULT (MASK_FP|MASK_FPREGS|MASK_GAS)
! #undef TARGET_ABI_OPEN_VMS
! #define TARGET_ABI_OPEN_VMS 1
  
  #undef TARGET_NAME   
  #define TARGET_NAME "OpenVMS/Alpha"


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]