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Re: snapshot 20010527 generates code which reads from below %esp (on i686-pc-linux-gnu)


On Fri, Jun 01, 2001 at 07:29:04AM -0700, Julian Seward (Intl Vendor) wrote:
> 	leal	-8(%ebp), %esp
> 
> 	# THIS IS THE OFFENDING INSN
> 	movl	4(%ebx), %eax

Confirmed.  I'd classify this as a fairly serious bug.  I am
currently testing the following fix.


r~

	* config/i386/i386.c (ix86_expand_prologue): Always use
	gen_pro_epilogue_adjust_stack; update arguments.
	(ix86_emit_epilogue_esp_adjustment): Likewise.
	(ix86_expand_epilogue): Likewise.
	* config/i386/i386.md (pro_epilogue_adjust_stack): Use a BLKmode
	clobber of scratch memory instead of a modification of EBP as the
	barrier.  Update all peepholes to match.

Index: i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.211.2.9
diff -c -p -d -r1.211.2.9 i386.c
*** i386.c	2001/05/31 17:28:56	1.211.2.9
--- i386.c	2001/06/11 23:55:46
*************** ix86_expand_prologue ()
*** 2072,2084 ****
      ;
    else if (! TARGET_STACK_PROBE || frame.to_allocate < CHECK_STACK_LIMIT)
      {
!       if (frame_pointer_needed)
! 	insn = emit_insn (gen_pro_epilogue_adjust_stack
! 			  (stack_pointer_rtx, stack_pointer_rtx,
! 		           GEN_INT (-frame.to_allocate), hard_frame_pointer_rtx));
!       else
!         insn = emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
! 				      GEN_INT (-frame.to_allocate)));
        RTX_FRAME_RELATED_P (insn) = 1;
      }
    else
--- 2072,2080 ----
      ;
    else if (! TARGET_STACK_PROBE || frame.to_allocate < CHECK_STACK_LIMIT)
      {
!       insn = emit_insn (gen_pro_epilogue_adjust_stack
! 			(stack_pointer_rtx, stack_pointer_rtx,
! 		         GEN_INT (-frame.to_allocate)));
        RTX_FRAME_RELATED_P (insn) = 1;
      }
    else
*************** static void
*** 2120,2135 ****
  ix86_emit_epilogue_esp_adjustment (tsize)
       int tsize;
  {
!   /* If a frame pointer is present, we must be sure to tie the sp
!      to the fp so that we don't mis-schedule.  */
!   if (frame_pointer_needed)
!     emit_insn (gen_pro_epilogue_adjust_stack (stack_pointer_rtx,
! 					      stack_pointer_rtx,
! 					      GEN_INT (tsize),
! 					      hard_frame_pointer_rtx));
!   else
!     emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
! 			   GEN_INT (tsize)));
  }
  
  /* Emit code to restore saved registers using MOV insns.  First register
--- 2116,2124 ----
  ix86_emit_epilogue_esp_adjustment (tsize)
       int tsize;
  {
!   emit_insn (gen_pro_epilogue_adjust_stack (stack_pointer_rtx,
! 					    stack_pointer_rtx,
! 					    GEN_INT (tsize)));
  }
  
  /* Emit code to restore saved registers using MOV insns.  First register
*************** ix86_expand_epilogue (style)
*** 2226,2233 ****
  	      emit_move_insn (hard_frame_pointer_rtx, tmp);
  
  	      emit_insn (gen_pro_epilogue_adjust_stack
! 			 (stack_pointer_rtx, sa, const0_rtx,
! 			  hard_frame_pointer_rtx));
  	    }
  	  else
  	    {
--- 2215,2221 ----
  	      emit_move_insn (hard_frame_pointer_rtx, tmp);
  
  	      emit_insn (gen_pro_epilogue_adjust_stack
! 			 (stack_pointer_rtx, sa, const0_rtx));
  	    }
  	  else
  	    {
*************** ix86_expand_epilogue (style)
*** 2247,2254 ****
  	{
  	  emit_insn (gen_pro_epilogue_adjust_stack (stack_pointer_rtx,
  						    hard_frame_pointer_rtx,
! 						    const0_rtx,
! 						    hard_frame_pointer_rtx));
  	  emit_insn (gen_popsi1 (hard_frame_pointer_rtx));
  	}
      }
--- 2235,2241 ----
  	{
  	  emit_insn (gen_pro_epilogue_adjust_stack (stack_pointer_rtx,
  						    hard_frame_pointer_rtx,
! 						    const0_rtx));
  	  emit_insn (gen_popsi1 (hard_frame_pointer_rtx));
  	}
      }
*************** ix86_expand_epilogue (style)
*** 2262,2269 ****
  	    abort ();
            emit_insn (gen_pro_epilogue_adjust_stack (stack_pointer_rtx,
  						    hard_frame_pointer_rtx,
! 						    GEN_INT (offset),
! 						    hard_frame_pointer_rtx));
  	}
        else if (frame.to_allocate)
  	ix86_emit_epilogue_esp_adjustment (frame.to_allocate);
--- 2249,2255 ----
  	    abort ();
            emit_insn (gen_pro_epilogue_adjust_stack (stack_pointer_rtx,
  						    hard_frame_pointer_rtx,
! 						    GEN_INT (offset)));
  	}
        else if (frame.to_allocate)
  	ix86_emit_epilogue_esp_adjustment (frame.to_allocate);
Index: i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.204.2.13
diff -c -p -d -r1.204.2.13 i386.md
*** i386.md	2001/05/25 18:12:50	1.204.2.13
--- i386.md	2001/06/11 23:55:46
***************
*** 1554,1560 ****
  (define_insn "*pushsi2_prologue"
    [(set (match_operand:SI 0 "push_operand" "=<")
  	(match_operand:SI 1 "general_no_elim_operand" "ri*m"))
!    (set (reg:SI 6) (reg:SI 6))]
    ""
    "push{l}\\t%1"
    [(set_attr "type" "push")
--- 1554,1560 ----
  (define_insn "*pushsi2_prologue"
    [(set (match_operand:SI 0 "push_operand" "=<")
  	(match_operand:SI 1 "general_no_elim_operand" "ri*m"))
!    (clobber (mem:BLK (scratch)))]
    ""
    "push{l}\\t%1"
    [(set_attr "type" "push")
***************
*** 1565,1571 ****
  	(mem:SI (reg:SI 7)))
     (set (reg:SI 7)
  	(plus:SI (reg:SI 7) (const_int 4)))
!    (set (reg:SI 6) (reg:SI 6))]
    ""
    "pop{l}\\t%0"
    [(set_attr "type" "pop")
--- 1565,1571 ----
  	(mem:SI (reg:SI 7)))
     (set (reg:SI 7)
  	(plus:SI (reg:SI 7) (const_int 4)))
!    (clobber (mem:BLK (scratch)))]
    ""
    "pop{l}\\t%0"
    [(set_attr "type" "pop")
***************
*** 9946,9952 ****
  
  (define_insn "leave"
    [(set (reg:SI 7) (reg:SI 6))
!    (set (reg:SI 6) (mem:SI (pre_dec:SI (reg:SI 7))))]
    ""
    "leave"
    [(set_attr "length_immediate" "0")
--- 9946,9953 ----
  
  (define_insn "leave"
    [(set (reg:SI 7) (reg:SI 6))
!    (set (reg:SI 6) (mem:SI (pre_dec:SI (reg:SI 7))))
!    (clobber (mem:BLK (scratch)))]
    ""
    "leave"
    [(set_attr "length_immediate" "0")
***************
*** 11811,11819 ****
    [(set (match_operand:SI 0 "register_operand" "=r,r")
  	(plus:SI (match_operand:SI 1 "register_operand" "0,r")
  	         (match_operand:SI 2 "immediate_operand" "i,i")))
!    (set (match_operand:SI 3 "register_operand" "+r,r")
! 	(match_dup 3))
!    (clobber (reg:CC 17))]
    ""
    "*
  {
--- 11812,11819 ----
    [(set (match_operand:SI 0 "register_operand" "=r,r")
  	(plus:SI (match_operand:SI 1 "register_operand" "0,r")
  	         (match_operand:SI 2 "immediate_operand" "i,i")))
!    (clobber (reg:CC 17))
!    (clobber (mem:BLK (scratch)))]
    ""
    "*
  {
***************
*** 12403,12425 ****
  (define_peephole2
    [(match_scratch:SI 0 "r")
     (parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -4)))
! 	      (set (reg:SI 6) (reg:SI 6))
! 	      (clobber (reg:CC 17))])]
    "optimize_size || !TARGET_SUB_ESP_4"
    [(clobber (match_dup 0))
     (parallel [(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 0))
! 	      (set (reg:SI 6) (reg:SI 6))])])
  
  (define_peephole2
    [(match_scratch:SI 0 "r")
     (parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
! 	      (set (reg:SI 6) (reg:SI 6))
! 	      (clobber (reg:CC 17))])]
    "optimize_size || !TARGET_SUB_ESP_8"
    [(clobber (match_dup 0))
     (set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 0))
     (parallel [(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 0))
! 	      (set (reg:SI 6) (reg:SI 6))])])
  
  ;; Convert esp substractions to push.
  (define_peephole2
--- 12403,12425 ----
  (define_peephole2
    [(match_scratch:SI 0 "r")
     (parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -4)))
! 	      (clobber (reg:CC 17))
! 	      (clobber (mem:BLK (scratch)))])]
    "optimize_size || !TARGET_SUB_ESP_4"
    [(clobber (match_dup 0))
     (parallel [(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 0))
! 	      (clobber (mem:BLK (scratch)))])])
  
  (define_peephole2
    [(match_scratch:SI 0 "r")
     (parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
! 	      (clobber (reg:CC 17))
! 	      (clobber (mem:BLK (scratch)))])]
    "optimize_size || !TARGET_SUB_ESP_8"
    [(clobber (match_dup 0))
     (set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 0))
     (parallel [(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 0))
! 	      (clobber (mem:BLK (scratch)))])])
  
  ;; Convert esp substractions to push.
  (define_peephole2
***************
*** 12443,12454 ****
  (define_peephole2
    [(match_scratch:SI 0 "r")
     (parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))
! 	      (set (reg:SI 6) (reg:SI 6))
! 	      (clobber (reg:CC 17))])]
    "optimize_size || !TARGET_ADD_ESP_4"
    [(parallel [(set (match_dup 0) (mem:SI (reg:SI 7)))
  	      (set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))
! 	      (set (reg:SI 6) (reg:SI 6))])]
    "")
  
  ;; Two pops case is tricky, since pop causes dependency on destination register.
--- 12443,12454 ----
  (define_peephole2
    [(match_scratch:SI 0 "r")
     (parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))
! 	      (clobber (reg:CC 17))
! 	      (clobber (mem:BLK (scratch)))])]
    "optimize_size || !TARGET_ADD_ESP_4"
    [(parallel [(set (match_dup 0) (mem:SI (reg:SI 7)))
  	      (set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))
! 	      (clobber (mem:BLK (scratch)))])]
    "")
  
  ;; Two pops case is tricky, since pop causes dependency on destination register.
***************
*** 12457,12468 ****
    [(match_scratch:SI 0 "r")
     (match_scratch:SI 1 "r")
     (parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 8)))
! 	      (set (reg:SI 6) (reg:SI 6))
! 	      (clobber (reg:CC 17))])]
    "optimize_size || !TARGET_ADD_ESP_8"
    [(parallel [(set (match_dup 0) (mem:SI (reg:SI 7)))
  	      (set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))
! 	      (set (reg:SI 6) (reg:SI 6))])
     (parallel [(set (match_dup 1) (mem:SI (reg:SI 7)))
  	      (set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))])]
    "")
--- 12457,12468 ----
    [(match_scratch:SI 0 "r")
     (match_scratch:SI 1 "r")
     (parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 8)))
! 	      (clobber (reg:CC 17))
! 	      (clobber (mem:BLK (scratch)))])]
    "optimize_size || !TARGET_ADD_ESP_8"
    [(parallel [(set (match_dup 0) (mem:SI (reg:SI 7)))
  	      (set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))
! 	      (clobber (mem:BLK (scratch)))])
     (parallel [(set (match_dup 1) (mem:SI (reg:SI 7)))
  	      (set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))])]
    "")
***************
*** 12470,12481 ****
  (define_peephole2
    [(match_scratch:SI 0 "r")
     (parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 8)))
! 	      (set (reg:SI 6) (reg:SI 6))
! 	      (clobber (reg:CC 17))])]
    "optimize_size"
    [(parallel [(set (match_dup 0) (mem:SI (reg:SI 7)))
  	      (set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))
! 	      (set (reg:SI 6) (reg:SI 6))])
     (parallel [(set (match_dup 0) (mem:SI (reg:SI 7)))
  	      (set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))])]
    "")
--- 12470,12481 ----
  (define_peephole2
    [(match_scratch:SI 0 "r")
     (parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 8)))
! 	      (clobber (reg:CC 17))
! 	      (clobber (mem:BLK (scratch)))])]
    "optimize_size"
    [(parallel [(set (match_dup 0) (mem:SI (reg:SI 7)))
  	      (set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))
! 	      (clobber (mem:BLK (scratch)))])
     (parallel [(set (match_dup 0) (mem:SI (reg:SI 7)))
  	      (set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))])]
    "")


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