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Re: PATCH: PA PIC symbolic memory fix PART 2
- To: law at redhat dot com
- Subject: Re: PATCH: PA PIC symbolic memory fix PART 2
- From: "John David Anglin" <dave at hiauly1 dot hia dot nrc dot ca>
- Date: Mon, 26 Feb 2001 13:06:44 -0500 (EST)
- Cc: gcc-patches at gcc dot gnu dot org
> In message <200102211758.MAA29559@hiauly1.hia.nrc.ca>you write:
> > Hmm. This suggests that the the DLT load insn should again be a separate
> > insn. Then, when a spill occurs for a source MEM equivalent pseudo, the
> > destination register could be used as a scratch register to resynthesize
> > the HIGH part.
> Maybe -- you still also have to get %r1 as a temporary as the addil
> instruction always has %r1 as its destinatin.
I think that is the key. We have to keep all uses of %r1 together until
reload has completed. If scheduling separates a pair of insns using %r1,
we can't substitute a pic MEM equivalent without possibly clobbering %r1.
On a related issue, I tried to determine why defining IS_RELOADING_PSEUDO_P
is necessary for non pic code. It seems without it that the following
substitution occasionally occurs into the catch all move insn at line 2099
(set (reg) (symbol))
Again, the insn at 2099 can't handle this. I hadn't fully appreciated
that CSE simplifies LO_SUM MEMs to just the constant symbol reference.
J. David Anglin email@example.com
National Research Council of Canada (613) 990-0752 (FAX: 952-6605)