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Re: [patches] Re: SSE min/max instruction support
> On Sat, Feb 24, 2001 at 04:20:34PM -0800, Richard Henderson wrote:
> > On Sun, Feb 25, 2001 at 12:25:24AM +0100, Jan Hubicka wrote:
> > > Whats also about explicitly documenting the i386 behaviour for smin/smax
> > > FP, so we can use them in IEEE compilation?
> > Not possible. Naturally the ia64 definition is the same
> > as the i386 definition. But rs6000 uses
> > tmp = a - b;
> > result = (tmp >= 0 ? a : b);
> > where the >= is hardcoded in "fsel %0,%1,%2,%3".
> Actually, I take this back. It is possible for us to define an order
> for this. If, for instance, we choose the Intel definition, then an
> implementation that breaks ties with the first argument merely needs
> to swap the arguments as present in the rtl. For rs6000 this becomes:
> tmp = b - a;
> result = (tmp >= 0 ? b : a);
> Everyone's happy.
Is that true in NaN case? I guess it is not.
If a is Nan
Or am I missing something?