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Re: PATCH for m68k.md


With the proposed change in the compiler the insn below should have a
source of either (d16, Ay) or (d8, Ay, Xi).  The destination should be
Ay. The table for the MOVE instruction in "MCF5XXXPRM Coldfire
Micropreocessor Family Programmers Reference Manual" describes what
combinations are allowed.

For the source of (d16, Ay) the destination addressing mode is listed as
"All possible except (d8, Ay, Xi), (xxx).W, (xxx).L"

For the source of (d8, Ay, Xi) the destination addressing mode is listed
as "All possible execpt (d8, Ay, Xi), (d16, Ay), (xxx).W, (xxx).L"

The entries in the table do not seem to exclude the constraint of memory
("m") as a source and address register ("a") as a destination.

In "ColdFire2/M User's Manual" Figure 1-5, Integer Unit User Programming
Model shows the address registers useable for 8-bit quantities.  The
manuals for m68000 and m68020 show the address registers as usable for
16-bit and 32-bit quantities.  However, text on the same page says that
the address registers are for 16-bit and 32-bit operations.

Table 3-2:Data Movement Operation Format lists "MOVEA" instruction only
working with 16 and 32 values, but the "MOVE" instruction appears that
it could do the byte move from memory to an address register.

Is there someone that can give a definitive answer on this?

-Will


Will Cohen wrote:
> 
> You are right. The manual for the 5200 has three pages of documentation
> for the move and movea instructions.  Most of the information is on the
> first two pages, which I read.  Unfortunately, the third page has the
> table that describes the legal combinations of source and destinations,
> which I didn't see.  Back to the drawing board.
> 
> -Will
> 
> Jeffrey A Law wrote:
> >
> >   In message <3A96E35E.AF51B00C@redhat.com>you write:
> >   > When building the compiler for the m68k (actually, the m5200 target). I
> >   > found that the the template for the movqi was missing the memory operand
> >   > in the constraints. This causes the compiler to fail in some when
> >   > compiling cp-demangle.c in libiberty with the "-m5200" option.  The
> >   > following insn pattern cannot be converted:
> >   >
> >   > (insn 1203 995 996 (set (reg:QI 8 %a0)
> >   >         (mem/f:QI (plus:SI (reg:SI 14 %a6)
> >   >                 (const_int -5 [0xfffffffb])) 0)) 37 {*m68k.md:1060}
> >   > (nil)
> >   >     (nil))
> >   >
> >   > The attached patch fixes this problem The change log is below:
> >   >
> >   > 2001-02-23  Will Cohen  <wcohen@redhat.com>
> >   >
> >   >     * config/m68k/m68k.md: Update movqi pattern for TARGET_5200.
> >   >
> >   > Is it okay to apply this patch?
> > I'm pretty sure this is wrong -- if I recall properly the 5200 can't actually
> > do byte sized moves into address registers.
> >
> > You can probably look in the gcc list archives and find the discussion behind
> > this patch:
> >
> > Sat Sep  5 03:23:05 1998  Jeffrey A Law  (law@cygnus.com)
> >
> >         * m68k.md (5200 movqi): Do not allow byte sized memory references
> >         using address regs.
> >         * m68k.c (output_move_qimode): Do not use byte sized operations on
> >         address registers.
> >
> > jeff


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