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SSE fixes


Hi
This patch fixes two problems pointed out by Richard and constraints
for SFmode sqrt.  Hope I got it right this time.

Wed Feb 14 00:19:28 CET 2001  Jan Hubicka  <jh@suse.cz>

	* i386.md (fixsfsi2, fixdfdi2): Fix previous patch again.
	(sqrtsf2): Use TARGET_SSE instead of TARGET_SSE2)
	(sqrtsf2 patterns): Use 'x' instead of 'Y'.
	(sqrtextendsfdf2): Disable for SSE2.

Index: config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.212
diff -c -3 -p -r1.212 i386.md
*** i386.md	2001/02/13 23:12:49	1.212
--- i386.md	2001/02/13 23:21:10
***************
*** 4097,4103 ****
  {
    if (TARGET_SSE2)
     {
!      rtx out = force_reg (SImode, operands[0]);
       emit_insn (gen_fix_truncdfsi_sse (out, operands[1]));
       if (out != operands[0])
  	emit_move_insn (operands[0], out);
--- 4097,4103 ----
  {
    if (TARGET_SSE2)
     {
!      rtx out = REG_P (operands[0]) ? operands[0] : gen_reg_rtx (SImode);
       emit_insn (gen_fix_truncdfsi_sse (out, operands[1]));
       if (out != operands[0])
  	emit_move_insn (operands[0], out);
***************
*** 4121,4127 ****
  {
    if (TARGET_SSE2)
     {
!      rtx out = force_reg (SImode, operands[0]);
       emit_insn (gen_fix_truncdfsi_sse (out, operands[1]));
       if (out != operands[0])
  	emit_move_insn (operands[0], out);
--- 4121,4127 ----
  {
    if (TARGET_SSE2)
     {
!      rtx out = REG_P (operands[0]) ? operands[0] : gen_reg_rtx (SImode);
       emit_insn (gen_fix_truncdfsi_sse (out, operands[1]));
       if (out != operands[0])
  	emit_move_insn (operands[0], out);
***************
*** 10860,10866 ****
    operands[4] = ix86_force_to_memory (GET_MODE (operands[2]), operands[2]);
    operands[4] = gen_rtx_FLOAT (GET_MODE (operands[0]), operands[4]);
    emit_insn (gen_rtx_SET (VOIDmode, operands[0],
! 			  gen_rtx_fmt_ee (GET_CODE (operands[3]),
  					  GET_MODE (operands[3]),
  					  operands[1],
  					  operands[4])));
--- 10860,10866 ----
    operands[4] = ix86_force_to_memory (GET_MODE (operands[2]), operands[2]);
    operands[4] = gen_rtx_FLOAT (GET_MODE (operands[0]), operands[4]);
    emit_insn (gen_rtx_SET (VOIDmode, operands[0],
! 			  gen_rtx_fmt_ee (GET_CODE (operands[5]),
  					  GET_MODE (operands[3]),
  					  operands[1],
  					  operands[4])));
***************
*** 10873,10879 ****
  (define_expand "sqrtsf2"
    [(set (match_operand:SF 0 "register_operand" "")
  	(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "")))]
!   "(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE2"
    "
  {
    if (!TARGET_SSE)
--- 10873,10879 ----
  (define_expand "sqrtsf2"
    [(set (match_operand:SF 0 "register_operand" "")
  	(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "")))]
!   "(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE"
    "
  {
    if (!TARGET_SSE)
***************
*** 10881,10888 ****
  }")
  
  (define_insn "sqrtsf2_1"
!   [(set (match_operand:SF 0 "register_operand" "=f#Y,Y#f")
! 	(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "0#Y,Ym#f")))]
    "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
     && (TARGET_SSE && TARGET_MIX_SSE_I387)"
    "@
--- 10881,10888 ----
  }")
  
  (define_insn "sqrtsf2_1"
!   [(set (match_operand:SF 0 "register_operand" "=f#x,x#f")
! 	(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "0#x,xm#f")))]
    "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
     && (TARGET_SSE && TARGET_MIX_SSE_I387)"
    "@
***************
*** 10893,10900 ****
     (set_attr "athlon_decode" "direct,*")])
  
  (define_insn "sqrtsf2_1_sse_only"
!   [(set (match_operand:SF 0 "register_operand" "=Y")
! 	(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "Ym")))]
    "TARGET_SSE && (!TARGET_80387 || !TARGET_MIX_SSE_I387)"
    "sqrtss\\t{%1, %0|%0, %1}"
    [(set_attr "type" "sse")
--- 10893,10900 ----
     (set_attr "athlon_decode" "direct,*")])
  
  (define_insn "sqrtsf2_1_sse_only"
!   [(set (match_operand:SF 0 "register_operand" "=x")
! 	(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "xm")))]
    "TARGET_SSE && (!TARGET_80387 || !TARGET_MIX_SSE_I387)"
    "sqrtss\\t{%1, %0|%0, %1}"
    [(set_attr "type" "sse")
***************
*** 10956,10962 ****
    [(set (match_operand:DF 0 "register_operand" "=f")
  	(sqrt:DF (float_extend:DF
  		  (match_operand:SF 1 "register_operand" "0"))))]
!   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387"
    "fsqrt"
    [(set_attr "type" "fpspc")
     (set_attr "mode" "DF")
--- 10956,10962 ----
    [(set (match_operand:DF 0 "register_operand" "=f")
  	(sqrt:DF (float_extend:DF
  		  (match_operand:SF 1 "register_operand" "0"))))]
!   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && !TARGET_SSE2"
    "fsqrt"
    [(set_attr "type" "fpspc")
     (set_attr "mode" "DF")


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