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Re: SSE scalar fp comparison patterns


> On Tue, Feb 13, 2001 at 10:27:03AM +0100, Jan Hubicka wrote:
> > *************** ix86_prepare_fp_compare_args (code, pop0
> > +   int is_sse = SSE_REG_P (op0) | SSE_REG_P (op1);
> 
> Why would ix86_prepare_fp_compare_args be dealing with sse hard registers
> already?  Are you just being prepared to handle sse global registers?

Not - it is called from split_fp_branch after reload, so it must handle
SSE_REGs properly - otherwise it just attempts to create pseudo.

> 
> > ! /* For sane SSE instruction set generation we need fcomi instruction.  It is
> > !    safe to enable all CMOVE instructions.  */
> > ! #define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE)
> 
> The biggest problem is the definition of the -msse (etc) options.  It
> really should be -march=p3 or -march=i686-sse or something.  In any
Agreed - I see this as just as temporary solution. I will add the
P4/P3 cpu specifications soon, just didn't wanted to mess this up.
I have P4 box for testing, so I can do basic tunning at same time.
> case, this doesn't seem right.  A slightly better solution without
> mucking -mfoo entirely is to tweek things in override_options.

Problem is that I can't enable CMOVE at -msse2, since it depends on
ix86_arch.  I can overwrite ix86_arch to at least pentiumpro with -msse2
but this don't seems to be nice solution.

I agree that in longer term we probably should kill the -msse(2) options
entirely and let them on the -march.
> 
> The rest of the patch I can't properly review until you catch up 
> with your merging.  This is a first.  ;-)  The line numbers don't
> match up properly and I can't really tell what order the new patterns
> are in wrt the old ones.
This is the last one - I will do the merger today. I guess you are
having late night right now, so I think you can give a sleep and I will
do the bootstraps/make checks till tomorrow.

Honza
> 
> 
> r~


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