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PATCH to dwarf2out_frame_debug_expr ARM support


Nick's change:

2000-12-22  Nick Clifton  <nickc@redhat.com>

	* dwarf2out_frame_debug_expr: Allow the (scratch) frame
	pointer to be initialised from the stack pointer plus a
	constant.

added code to handle (set <reg> (plus <CFA reg> (const_int n))), but it
threw away the constant.  This seems very wrong.  Looking at the arm.c
code, it appears that

1) This pattern only occurs in nested functions, and
2) This bug compensates for another bug, whereby the ARM port never tells
   the dwarf backend about an SP adjustment in the prologue.

So this code happens to work for the ARM by accident, but is likely to
break on any other target that produces this sort of instruction.

I propose the following (untested, not checked in) change.  Nick, any
input?  Care to give it a whirl?

2001-02-08  Jason Merrill  <jason@redhat.com>

	* config/arm/arm.c (arm_expand_prologue): Do tell the dwarf2 backend
	about the SP adjustment for saving the static chain pointer.
	* dwarf2out.c (dwarf2out_frame_debug_expr): Use the specified
	offset when setting a temporary CFA register.

*** config/arm/arm.c.~1~	Tue Feb  6 16:28:53 2001
--- config/arm/arm.c	Thu Feb  8 16:53:36 2001
*************** arm_expand_prologue ()
*** 7804,7830 ****
  		  
  	     If neither of these places is available, we abort (for now).
  
! 	     Note - setting RTX_FRAME_RELATED_P on these insns breaks
! 	     the dwarf2 parsing code in various bits of gcc.  This ought
! 	     to be fixed sometime, but until then the flag is suppressed.
! 	     [Use gcc/testsuite/gcc.c-torture/execute/921215-1.c with
! 	     "-O3 -g" to test this].  */
  
  	  if (regs_ever_live[3] == 0)
  	    {
  	      insn = gen_rtx_REG (SImode, 3);
  	      insn = gen_rtx_SET (SImode, insn, ip_rtx);
  	      insn = emit_insn (insn);
- 	      /* RTX_FRAME_RELATED_P (insn) = 1; */
  	    }
  	  else if (current_function_pretend_args_size == 0)
  	    {
  	      insn = gen_rtx_PRE_DEC (SImode, stack_pointer_rtx);
  	      insn = gen_rtx_MEM (SImode, insn);
  	      insn = gen_rtx_SET (VOIDmode, insn, ip_rtx);
  	      insn = emit_insn (insn);
! 	      /* RTX_FRAME_RELATED_P (insn) = 1; */
  	      fp_offset = 4;
  	    }
  	  else
  	    /* FIXME - the way to handle this situation is to allow
--- 7804,7837 ----
  		  
  	     If neither of these places is available, we abort (for now).
  
! 	     Note - we only need to tell the dwarf2 backend about the SP
! 	     adjustment in the second variant; the static chain register
! 	     doesn't need to be unwound, as it doesn't contain a value
! 	     inherited from the caller.  */
  
  	  if (regs_ever_live[3] == 0)
  	    {
  	      insn = gen_rtx_REG (SImode, 3);
  	      insn = gen_rtx_SET (SImode, insn, ip_rtx);
  	      insn = emit_insn (insn);
  	    }
  	  else if (current_function_pretend_args_size == 0)
  	    {
+ 	      rtx dwarf;
  	      insn = gen_rtx_PRE_DEC (SImode, stack_pointer_rtx);
  	      insn = gen_rtx_MEM (SImode, insn);
  	      insn = gen_rtx_SET (VOIDmode, insn, ip_rtx);
  	      insn = emit_insn (insn);
! 
  	      fp_offset = 4;
+ 
+ 	      /* Just tell the dwarf backend that we adjusted SP.  */
+ 	      dwarf = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
+ 				   gen_rtx_PLUS (SImode, stack_pointer_rtx,
+ 						 GEN_INT (-fp_offset)));
+ 	      RTX_FRAME_RELATED_P (insn) = 1;
+ 	      REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
+ 						    dwarf, REG_NOTES (insn));
  	    }
  	  else
  	    /* FIXME - the way to handle this situation is to allow
*************** arm_expand_prologue ()
*** 7931,7937 ****
  	      insn = gen_rtx_REG (SImode, 3);
  	      insn = gen_rtx_SET (SImode, ip_rtx, insn);
  	      insn = emit_insn (insn);
- 	      /* RTX_FRAME_RELATED_P (insn) = 1; */
  	    }
  	  else /* if (current_function_pretend_args_size == 0) */
  	    {
--- 7938,7943 ----
*************** arm_expand_prologue ()
*** 7939,7945 ****
  	      insn = gen_rtx_MEM (SImode, insn);
  	      insn = gen_rtx_SET (SImode, ip_rtx, insn);
  	      insn = emit_insn (insn);
- 	      /* RTX_FRAME_RELATED_P (insn) = 1; */
  	    }
  	}
      }
--- 7945,7950 ----
*** dwarf2out.c.~1~	Thu Feb  8 12:40:53 2001
--- dwarf2out.c	Thu Feb  8 12:41:00 2001
*************** dwarf2out_frame_debug_expr (expr, label)
*** 1547,1558 ****
  	      if (GET_CODE (XEXP (src, 0)) == REG
  		  && REGNO (XEXP (src, 0)) == cfa.reg
  		  && GET_CODE (XEXP (src, 1)) == CONST_INT)
! 		/* Setting the FP (or a scratch that will be copied into the FP
! 		   later on) from SP + const.  */
! 		cfa.reg = REGNO (dest);
  	      /* Rule 5 */
  	      else
  		{
  		  if (XEXP (src, 1) != stack_pointer_rtx)
  		    abort ();
  		  if (GET_CODE (XEXP (src, 0)) != REG
--- 1543,1562 ----
  	      if (GET_CODE (XEXP (src, 0)) == REG
  		  && REGNO (XEXP (src, 0)) == cfa.reg
  		  && GET_CODE (XEXP (src, 1)) == CONST_INT)
! 		{
! 		  /* Setting a temporary CFA register that will be copied
! 		     into the FP later on.  */
! 		  offset = INTVAL (XEXP (src, 1));
! 		  if (GET_CODE (src) == PLUS)
! 		    offset = -offset;
! 		  cfa.offset += offset;
! 		  cfa.reg = REGNO (dest);
! 		}
  	      /* Rule 5 */
  	      else
  		{
+ 		  /* Setting a scratch register that we will use instead
+ 		     of SP for saving registers to the stack.  */
  		  if (XEXP (src, 1) != stack_pointer_rtx)
  		    abort ();
  		  if (GET_CODE (XEXP (src, 0)) != REG

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