This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

Re: new-regalloc.c patch


> You say that edge weight of v1 and v2 equal to
> MAX (v1 hard regs, v2 hard regs).
>
> Is this true ?
Yes.
Assuming the registers must be consecutive.
>
> > > > >    On some machines, double-precision values must be kept in even/odd
> > > > >    register pairs.  The way to implement that is to define this macro
> > > > >    to reject odd register numbers for such modes.
> > > > > --------^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> > > >
> > > > Wheee.
> > > >
> > > > Let me double check that the change doesn't break anything for weird
> > > > reasons, and i'll check it in as well.
> > >
> > > Is you agree here (remove HARD_REGNO_MODE_OK) ?
> > >
> > Yeah.
>
> It is a real and simple bug.
>
> What is "Yeah" ? I can't understand you.
>
Yeah = yes.



Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]