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Sign-extend when truncating a CONST_INTs to a certain mode


conversion.c would fail with -O3 on a FPU-disabled 64-bit target.
Here's a simplified version of the test:

static inline double u2d(u) unsigned int u; { return u; }

main() { if (u2d(~0U) != (double) ~0U) abort(); exit(0); }

The problem is that the code sequence generated to convert the
unsigned value ~0U to double in the inlined copy of u2d is as follows:

double res = (signed) ~0U;
if ((signed)~0U < 0)
  res += pow (2, 32);

The problem is that the conversion of ~U0 to res is folded during cse
*without* sign-extension, so the initial value of res is already
correct.  But then, it's added 1<<32, getting almost twice as large as
needed.

I could have fixed this by modifying only the appropriate conversion
operation so as to do a sign-extension, but I decided to try a more
generic approach, and it worked.  I.e., i686, alpha and sparc all
bootstrapped with this patch, and the testsuite results weren't the
disaster I had expected at first :-)

Opinions?  Ok to install?

Index: gcc/ChangeLog
from  Alexandre Oliva  <aoliva@redhat.com>

	* explow.c (trunc_int_for_mode): Sign-extend value to mode.

Index: gcc/explow.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/explow.c,v
retrieving revision 1.56
diff -u -p -r1.56 explow.c
--- gcc/explow.c 2001/01/22 18:59:36 1.56
+++ gcc/explow.c 2001/01/29 05:36:37
@@ -56,28 +56,16 @@ trunc_int_for_mode (c, mode)
   if (mode == BImode)
     return c & 1 ? STORE_FLAG_VALUE : 0;
 
-  /* We clear out all bits that don't belong in MODE, unless they and our
-     sign bit are all one.  So we get either a reasonable negative
-     value or a reasonable unsigned value.  */
+  /* Sign-extend for the requested mode.  */
 
-  if (width < HOST_BITS_PER_WIDE_INT
-      && ((c & ((HOST_WIDE_INT) (-1) << (width - 1)))
-           != ((HOST_WIDE_INT) (-1) << (width - 1))))
-    c &= ((HOST_WIDE_INT) 1 << width) - 1;
-
-  /* If this would be an entire word for the target, but is not for
-     the host, then sign-extend on the host so that the number will look
-     the same way on the host that it would on the target.
-
-     For example, when building a 64 bit alpha hosted 32 bit sparc
-     targeted compiler, then we want the 32 bit unsigned value -1 to be
-     represented as a 64 bit value -1, and not as 0x00000000ffffffff.
-     The later confuses the sparc backend.  */
-
-  if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
-      && BITS_PER_WORD == width
-      && (c & ((HOST_WIDE_INT) 1 << (width - 1))))
-    c |= ((HOST_WIDE_INT) (-1) << width);
+  if (width < HOST_BITS_PER_WIDE_INT)
+    {
+      HOST_WIDE_INT sign = 1;
+      sign <<= width - 1;
+      c &= (sign << 1) - 1;
+      c ^= sign;
+      c -= sign;
+    }
 
   return c;
 }

-- 
Alexandre Oliva   Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
Red Hat GCC Developer                  aoliva@{cygnus.com, redhat.com}
CS PhD student at IC-Unicamp        oliva@{lsd.ic.unicamp.br, gnu.org}
Free Software Evangelist    *Please* write to mailing lists, not to me

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