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[PATCH]: Document 68hc11 & 68hc12 port
- To: gcc-patches at gcc dot gnu dot org
- Subject: [PATCH]: Document 68hc11 & 68hc12 port
- From: Stephane Carrez <Stephane dot Carrez at worldnet dot fr>
- Date: Wed, 13 Sep 2000 00:19:43 +0200
Hi!
The following patch contains the documentation for 68hc11&68hc12 port.
It documents the configury, the specific options and the machine constraints.
Is it Ok to commit?
Stephane
2000-09-12 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* md.texi (Machine Constraints): Document the 68HC11 constraints.
* install.texi (Configurations): Document the 68HC11&68HC12 port.
* invoke.texi (Option Summary, M68hc1x Options): Document the options.
diff -Nrup --exclude-from=gcc-exclude.lst /src/gnu/cygnus/gcc/gcc/install.texi gcc/gcc/install.texi
--- /src/gnu/cygnus/gcc/gcc/install.texi Tue Sep 12 23:04:38 2000
+++ gcc/gcc/install.texi Wed Sep 13 00:12:07 2000
@@ -751,9 +751,9 @@ Here are the possible CPU types:
@c gmicro, fx80, spur and tahoe omitted since they don't work.
1750a, a29k, alpha, arm, avr, c@var{n}, clipper, dsp16xx, elxsi, fr30, h8300,
hppa1.0, hppa1.1, i370, i386, i486, i586, i686, i786, i860, i960, m32r,
-m68000, m68k, m88k, mcore, mips, mipsel, mips64, mips64el, mn10200, mn10300,
-ns32k, pdp11, powerpc, powerpcle, romp, rs6000, sh, sparc, sparclite,
-sparc64, v850, vax, we32k.
+m68000, m68k, m6811, m6812, m88k, mcore, mips, mipsel, mips64, mips64el,
+mn10200, mn10300, ns32k, pdp11, powerpc, powerpcle, romp, rs6000, sh, sparc,
+sparclite, sparc64, v850, vax, we32k.
@end quotation
Here are the recognized company names. As you can see, customary
@@ -1342,6 +1342,14 @@ point traps inherently cannot work with
See @ref{Sun Install}, for information on installing GNU CC on Sun
systems.
+
+@item m6811-elf
+Motorola 68HC11 family micro controllers. These are used in embedded
+applications. There are no standard Unix configurations.
+
+@item m6812-elf
+Motorola 68HC12 family micro controllers. These are used in embedded
+applications. There are no standard Unix configurations.
@item m88k-*-svr3
Motorola m88k running the AT&T/Unisoft/Motorola V.3 reference port.
diff -Nrup --exclude-from=gcc-exclude.lst /src/gnu/cygnus/gcc/gcc/invoke.texi gcc/gcc/invoke.texi
--- /src/gnu/cygnus/gcc/gcc/invoke.texi Fri Sep 8 23:46:59 2000
+++ gcc/gcc/invoke.texi Wed Sep 13 00:12:07 2000
@@ -233,6 +233,10 @@ in the following sections.
-mfpa -mnobitfield -mrtd -mshort -msoft-float -mpcrel
-malign-int -mstrict-align
+@emph{M68hc1x Options}
+-m6811 -m6812 -m68hc11 -m68hc12
+-mauto-incdec -mshort -msoft-reg-count=@var{count}
+
@emph{VAX Options}
-mg -mgnu -munix
@@ -2360,6 +2364,9 @@ standard error.
Annotate the assembler output with a comment indicating which
pattern and alternative was used. The length of each instruction is
also printed.
+@item P
+Dump the RTL in the assembler output as a comment before each instruction.
+Also turns on @samp{-dp} annotation.
@item v
For each of the other indicated dump files (except for
@file{@var{file}.00.rtl}), dump a representation of the control flow graph
@@ -3889,6 +3896,7 @@ that macro, which enables you to change
@menu
* M680x0 Options::
+* M68hc1x Options::
* VAX Options::
* SPARC Options::
* Convex Options::
@@ -4066,6 +4074,41 @@ not presently supported with -mpcrel, th
@kindex -mstrict-align
Do not (do) assume that unaligned memory references will be handled by
the system.
+
+@end table
+
+@node M68hc1x Options
+@subsection M68hc1x Options
+@cindex M68hc1x options
+
+These are the @samp{-m} options defined for the 68hc11 and 68hc12
+microcontrollers. The default values for these options depends on
+which style of microcontroller was selected when the compiler was configured;
+the defaults for the most common choices are given below.
+
+@table @code
+@item -m6811
+@itemx -m68hc11
+Generate output for a 68HC11. This is the default
+when the compiler is configured for 68HC11-based systems.
+
+@item -m6812
+@itemx -m68hc12
+Generate output for a 68HC12. This is the default
+when the compiler is configured for 68HC12-based systems.
+
+@item -mauto-incdec
+Enable the use of 68HC12 pre and post auto-increment and auto-decrement
+addressing modes.
+
+@item -mshort
+Consider type @code{int} to be 16 bits wide, like @code{short int}.
+
+@item -msoft-reg-count=@var{count}
+Specify the number of pseudo-soft registers which are used for the
+code generation. The maximum number is 32. Using more pseudo-soft
+register may or may not result in better code depending on the program.
+The default is 4 for 68HC11 and 2 for 68HC12.
@end table
diff -Nrup --exclude-from=gcc-exclude.lst /src/gnu/cygnus/gcc/gcc/md.texi gcc/gcc/md.texi
--- /src/gnu/cygnus/gcc/gcc/md.texi Sat Sep 2 11:59:35 2000
+++ gcc/gcc/md.texi Wed Sep 13 00:12:07 2000
@@ -1660,6 +1660,64 @@ Floating point constant that is not a 68
Floating point constant that can be used by Sun FPA
@end table
+@item Motorola 68HC11 & 68HC12 families---@file{m68hc11.h}
+@table @code
+@item a
+Register 'a'
+
+@item b
+Register 'b'
+
+@item d
+Register 'd'
+
+@item q
+An 8-bit register
+
+@item t
+Temporary soft register _.tmp
+
+@item u
+A soft register _.d1 to _.d31
+
+@item w
+Stack pointer register
+
+@item x
+Register 'x'
+
+@item y
+Register 'y'
+
+@item z
+Pseudo register 'z' (replaced by 'x' or 'y' at the end)
+
+@item A
+An address register: x, y or z
+
+@item B
+An address register: x or y
+
+@item D
+Register pair (x:d) to form a 32-bit value
+
+@item L
+Constants in the range -65536 to 65535
+
+@item M
+Constants whose 16-bit low part is zero
+
+@item N
+Constant integer 1 or -1
+
+@item O
+Constant integer 16
+
+@item P
+Constants in the range -8 to 2
+
+@end table
+
@need 1000
@item SPARC---@file{sparc.h}
@table @code