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Re: Problems with the way we calculate costs


>>>>> "Jeffrey" == Jeffrey A Law <law@cygnus.com> writes:

 >   In message <jm1yyv9137.fsf@envy.cygnus.com>you write:
 > [ Big Snip ]
 >> (insn 1033 1032 1034 (set (mem/s:QI (plus:SI (reg:SI 396)
 >> (const_int 2 [0x2])) 0)
 >> (reg:QI 399)) -1 (nil)
 >> (nil))
 >> 
 >> ; so CSE substitutes (reg:SI 3) in here, and the insn is unrecognizable
 >> ; because the modes don't match.
 >> 
 >> 
 >> However, I don't like the way that CSE stretched the lifespan of r3
 >> over so many insns in the first place, and would much rather this
 >> didn't happen.  Explicit hard register uses like this are bad and
 >> are likely to cause problems later in the compiler.
 > Not unlike the problem Aldy & I ran into on an ARM variant we're working
 > on.    Bernd posted a patch this morning, but I haven't had a chance to 
 > look at it.

Indeed, quite similar.

I have tried Bernd's patch and my Arm builds are back to normal.

Aldy

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