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minor think-os in ia64 division
- To: gcc-patches at gcc dot gnu dot org
- Subject: minor think-os in ia64 division
- From: Richard Henderson <rth at cygnus dot com>
- Date: Thu, 7 Sep 2000 23:20:35 -0700
These buglets didn't affect the correctness of the division itself.
The missing .s1 corrupted IEEE accrued exception state; the normalize
is needed to prevent the slow software assist faults.
r~
* config/ia64/lib1funcs.asm (__divsi3): Use .s1 for frcpa.
(__modsi3, __umodsi3): Likewise.
(__udivsi3): Likewise. Normalize the TFmode values.
Index: lib1funcs.asm
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/ia64/lib1funcs.asm,v
retrieving revision 1.9
diff -c -p -d -r1.9 lib1funcs.asm
*** lib1funcs.asm 2000/09/06 03:20:53 1.9
--- lib1funcs.asm 2000/09/08 06:14:33
*************** __divsi3:
*** 349,355 ****
fcvt.xf f9 = f9
;;
setf.exp f11 = r2
! frcpa f10, p6 = f8, f9
;;
(p6) fmpy.s1 f8 = f8, f10
(p6) fnma.s1 f9 = f9, f10, f1
--- 349,355 ----
fcvt.xf f9 = f9
;;
setf.exp f11 = r2
! frcpa.s1 f10, p6 = f8, f9
;;
(p6) fmpy.s1 f8 = f8, f10
(p6) fnma.s1 f9 = f9, f10, f1
*************** __modsi3:
*** 393,399 ****
fcvt.xf f9 = f9
;;
setf.exp f11 = r2
! frcpa f10, p6 = f8, f9
;;
(p6) fmpy.s1 f12 = f8, f10
(p6) fnma.s1 f10 = f9, f10, f1
--- 393,399 ----
fcvt.xf f9 = f9
;;
setf.exp f11 = r2
! frcpa.s1 f10, p6 = f8, f9
;;
(p6) fmpy.s1 f12 = f8, f10
(p6) fnma.s1 f10 = f9, f10, f1
*************** __udivsi3:
*** 435,442 ****
setf.sig f8 = in0
setf.sig f9 = in1
;;
setf.exp f11 = r2
! frcpa f10, p6 = f8, f9
;;
(p6) fmpy.s1 f8 = f8, f10
(p6) fnma.s1 f9 = f9, f10, f1
--- 435,445 ----
setf.sig f8 = in0
setf.sig f9 = in1
;;
+ fcvt.xf f8 = f8
+ fcvt.xf f9 = f9
+ ;;
setf.exp f11 = r2
! frcpa.s1 f10, p6 = f8, f9
;;
(p6) fmpy.s1 f8 = f8, f10
(p6) fnma.s1 f9 = f9, f10, f1
*************** __umodsi3:
*** 480,486 ****
fcvt.xf f9 = f9
;;
setf.exp f11 = r2
! frcpa f10, p6 = f8, f9
;;
(p6) fmpy.s1 f12 = f8, f10
(p6) fnma.s1 f10 = f9, f10, f1
--- 483,489 ----
fcvt.xf f9 = f9
;;
setf.exp f11 = r2
! frcpa.s1 f10, p6 = f8, f9
;;
(p6) fmpy.s1 f12 = f8, f10
(p6) fnma.s1 f10 = f9, f10, f1