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no_new_pseudos conversion for arm.md
- To: gcc-patches at gcc dot gnu dot org
- Subject: no_new_pseudos conversion for arm.md
- From: Jeffrey A Law <law at cygnus dot com>
- Date: Fri, 01 Sep 2000 00:07:07 -0600
- Reply-To: law at cygnus dot com
As promised:
* arm.md: Use no_new_pseudos to determine when it is safe
to create new pseudo registers.
Index: arm.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/arm/arm.md,v
retrieving revision 1.56
diff -c -3 -p -r1.56 arm.md
*** arm.md 2000/08/15 15:14:06 1.56
--- arm.md 2000/09/01 06:02:10
***************
*** 455,462 ****
{
arm_split_constant (PLUS, SImode, INTVAL (operands[2]), operands[0],
operands[1],
! (reload_in_progress || reload_completed ? 0
! : preserve_subexpressions_p ()));
DONE;
}
"
--- 455,461 ----
{
arm_split_constant (PLUS, SImode, INTVAL (operands[2]), operands[0],
operands[1],
! (no_new_pseudos ? 0 : preserve_subexpressions_p ()));
DONE;
}
"
***************
*** 951,957 ****
{
arm_split_constant (MINUS, SImode, INTVAL (operands[1]),
operands[0],
operands[2],
! (reload_in_progress || reload_completed ? 0
: preserve_subexpressions_p ()));
DONE;
}
--- 950,956 ----
{
arm_split_constant (MINUS, SImode, INTVAL (operands[1]),
operands[0],
operands[2],
! (no_new_pseudos ? 0
: preserve_subexpressions_p ()));
DONE;
}
***************
*** 1647,1653 ****
{
arm_split_constant (AND, SImode, INTVAL (operands[2]), operands[0],
operands[1],
! (reload_in_progress || reload_completed
? 0 : preserve_subexpressions_p ()));
DONE;
}
--- 1646,1652 ----
{
arm_split_constant (AND, SImode, INTVAL (operands[2]), operands[0],
operands[1],
! (no_new_pseudos
? 0 : preserve_subexpressions_p ()));
DONE;
}
***************
*** 2063,2069 ****
{
arm_split_constant (IOR, SImode, INTVAL (operands[2]), operands[0],
operands[1],
! (reload_in_progress || reload_completed
? 0 : preserve_subexpressions_p ()));
DONE;
}
--- 2062,2068 ----
{
arm_split_constant (IOR, SImode, INTVAL (operands[2]), operands[0],
operands[1],
! (no_new_pseudos
? 0 : preserve_subexpressions_p ()));
DONE;
}
***************
*** 3698,3704 ****
"
if (TARGET_THUMB)
{
! if (! (reload_in_progress || reload_completed))
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (DImode, operands[1]);
--- 3697,3703 ----
"
if (TARGET_THUMB)
{
! if (! no_new_pseudos)
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (DImode, operands[1]);
***************
*** 3781,3794 ****
{
arm_split_constant (SET, SImode, INTVAL (operands[1]),
operands[0],
NULL_RTX,
! (reload_in_progress || reload_completed ? 0
: preserve_subexpressions_p ()));
DONE;
}
}
else /* TARGET_THUMB.... */
{
! if (! (reload_in_progress || reload_completed))
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (SImode, operands[1]);
--- 3780,3793 ----
{
arm_split_constant (SET, SImode, INTVAL (operands[1]),
operands[0],
NULL_RTX,
! (no_new_pseudos ? 0
: preserve_subexpressions_p ()));
DONE;
}
}
else /* TARGET_THUMB.... */
{
! if (! no_new_pseudos)
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (SImode, operands[1]);
***************
*** 3800,3808 ****
|| symbol_mentioned_p (operands[1])
|| label_mentioned_p (operands[1])))
operands[1] = legitimize_pic_address (operands[1], SImode,
! ((reload_in_progress
! || reload_completed)
! ? operands[0] : 0));
")
(define_insn "*arm_movsi_insn"
--- 3799,3805 ----
|| symbol_mentioned_p (operands[1])
|| label_mentioned_p (operands[1])))
operands[1] = legitimize_pic_address (operands[1], SImode,
! (no_new_pseudos ? operands[0] : 0));
")
(define_insn "*arm_movsi_insn"
***************
*** 4125,4131 ****
"
if (TARGET_ARM)
{
! if (! (reload_in_progress || reload_completed))
{
if (GET_CODE (operands[0]) == MEM)
{
--- 4122,4128 ----
"
if (TARGET_ARM)
{
! if (! no_new_pseudos)
{
if (GET_CODE (operands[0]) == MEM)
{
***************
*** 4268,4274 ****
}
else /* TARGET_THUMB */
{
! if (! (reload_in_progress || reload_completed))
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (HImode, operands[1]);
--- 4265,4271 ----
}
else /* TARGET_THUMB */
{
! if (! no_new_pseudos)
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (HImode, operands[1]);
***************
*** 4544,4550 ****
{
/* Everything except mem = const or mem = mem can be done easily */
! if (!(reload_in_progress || reload_completed))
{
if (GET_CODE (operands[1]) == CONST_INT)
{
--- 4541,4547 ----
{
/* Everything except mem = const or mem = mem can be done easily */
! if (!no_new_pseudos)
{
if (GET_CODE (operands[1]) == CONST_INT)
{
***************
*** 4559,4565 ****
}
else /* TARGET_THUMB */
{
! if (! (reload_in_progress || reload_completed))
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (QImode, operands[1]);
--- 4556,4562 ----
}
else /* TARGET_THUMB */
{
! if (! no_new_pseudos)
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (QImode, operands[1]);
***************
*** 4649,4655 ****
}
else /* TARGET_THUMB */
{
! if (! (reload_in_progress || reload_completed))
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (SFmode, operands[1]);
--- 4646,4652 ----
}
else /* TARGET_THUMB */
{
! if (! no_new_pseudos)
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (SFmode, operands[1]);
***************
*** 4748,4754 ****
}
else /* TARGET_THUMB */
{
! if (! (reload_in_progress || reload_completed))
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (DFmode, operands[1]);
--- 4745,4751 ----
}
else /* TARGET_THUMB */
{
! if (! no_new_pseudos)
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (DFmode, operands[1]);