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mn10300: remove warnings and fix reload bug
- To: gcc-patches at gcc dot gnu dot org
- Subject: mn10300: remove warnings and fix reload bug
- From: Alexandre Oliva <aoliva at redhat dot com>
- Date: 07 Aug 2000 08:25:51 -0300
- Cc: Graham Stott <grahams at cygnus dot co dot uk>
- Organization: GCC Team, Red Hat
I'm checking in a few changes Graham had posted to an internal Red Hat
mailing list a while ago, and apparently forgot to install in the GCC
sources.
Index: gcc/ChangeLog
from Graham Stott <grahams@cygnus.co.uk>
* mn10300.md: Use nonimmediate_operand instead of general_operand
on output operands.
* mn10300.h (PREFERRED_RELOAD_CLASS): Limit memory reloads.
Index: gcc/config/mn10300/mn10300.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/mn10300/mn10300.h,v
retrieving revision 1.36
diff -u -r1.36 mn10300.h
--- gcc/config/mn10300/mn10300.h 2000/06/27 02:26:22 1.36
+++ gcc/config/mn10300/mn10300.h 2000/08/07 11:21:13
@@ -379,9 +379,12 @@
In general this is just CLASS; but on some machines
in some cases it is preferable to use a more restrictive class. */
-#define PREFERRED_RELOAD_CLASS(X,CLASS) \
- (X == stack_pointer_rtx && CLASS != SP_REGS \
- ? ADDRESS_OR_EXTENDED_REGS : CLASS)
+#define PREFERRED_RELOAD_CLASS(X,CLASS) \
+ ((X) == stack_pointer_rtx && (CLASS) != SP_REGS \
+ ? ADDRESS_OR_EXTENDED_REGS \
+ : (GET_CODE (X) == MEM \
+ ? LIMIT_RELOAD_CLASS (GET_MODE (X), CLASS) \
+ : (CLASS)))
#define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) \
(X == stack_pointer_rtx && CLASS != SP_REGS \
Index: gcc/config/mn10300/mn10300.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/mn10300/mn10300.md,v
retrieving revision 1.35
diff -u -r1.35 mn10300.md
--- gcc/config/mn10300/mn10300.md 2000/05/20 23:05:59 1.35
+++ gcc/config/mn10300/mn10300.md 2000/08/07 11:21:13
@@ -56,7 +56,7 @@
}")
(define_insn ""
- [(set (match_operand:QI 0 "general_operand" "=d*x*a,d*x,d*x*a,d*x*a,m")
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=d*x*a,d*x,d*x*a,d*x*a,m")
(match_operand:QI 1 "general_operand" "0,I,d*xai,m,d*xa"))]
"TARGET_AM33
&& (register_operand (operands[0], QImode)
@@ -99,7 +99,7 @@
[(set_attr "cc" "none,clobber,none_0hit,none_0hit,none_0hit")])
(define_insn ""
- [(set (match_operand:QI 0 "general_operand" "=d*a,d,d*a,d,m")
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=d*a,d,d*a,d,m")
(match_operand:QI 1 "general_operand" "0,I,dai,m,d"))]
"register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode)"
@@ -146,7 +146,7 @@
}")
(define_insn ""
- [(set (match_operand:HI 0 "general_operand" "=d*x*a,d*x,d*x*a,d*x*a,m")
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=d*x*a,d*x,d*x*a,d*x*a,m")
(match_operand:HI 1 "general_operand" "0,I,d*x*ai,m,d*x*a"))]
"TARGET_AM33
&& (register_operand (operands[0], HImode)
@@ -189,7 +189,7 @@
[(set_attr "cc" "none,clobber,none_0hit,none_0hit,none_0hit")])
(define_insn ""
- [(set (match_operand:HI 0 "general_operand" "=d*a,d,d*a,d,m")
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=d*a,d,d*a,d,m")
(match_operand:HI 1 "general_operand" "0,I,dai,m,d"))]
"register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode)"
@@ -275,7 +275,7 @@
}")
(define_insn ""
- [(set (match_operand:SI 0 "general_operand"
+ [(set (match_operand:SI 0 "nonimmediate_operand"
"=dx,ax,dx,a,dxm,dxm,axm,axm,dx,dx,ax,ax,axR,!*y")
(match_operand:SI 1 "general_operand"
"0,0,I,I,dx,ax,dx,ax,dixm,aixm,dixm,aixm,!*y,axR"))]
@@ -339,7 +339,7 @@
}")
(define_insn ""
- [(set (match_operand:SF 0 "general_operand" "=dx,ax,dx,a,daxm,dax")
+ [(set (match_operand:SF 0 "nonimmediate_operand" "=dx,ax,dx,a,daxm,dax")
(match_operand:SF 1 "general_operand" "0,0,G,G,dax,daxFm"))]
"register_operand (operands[0], SFmode)
|| register_operand (operands[1], SFmode)"
@@ -384,7 +384,7 @@
}")
(define_insn ""
- [(set (match_operand:DI 0 "general_operand"
+ [(set (match_operand:DI 0 "nonimmediate_operand"
"=dx,ax,dx,a,dxm,dxm,axm,axm,dx,dx,ax,ax")
(match_operand:DI 1 "general_operand"
"0,0,I,I,dx,ax,dx,ax,dxim,axim,dxim,axim"))]
@@ -534,7 +534,7 @@
}")
(define_insn ""
- [(set (match_operand:DF 0 "general_operand"
+ [(set (match_operand:DF 0 "nonimmediate_operand"
"=dx,ax,dx,a,dxm,dxm,axm,axm,dx,dx,ax,ax")
(match_operand:DF 1 "general_operand"
"0,0,G,G,dx,ax,dx,ax,dxFm,axFm,dxFm,axFm"))]
@@ -970,10 +970,10 @@
[(set_attr "cc" "set_zn")])
(define_insn "udivmodsi4"
- [(set (match_operand:SI 0 "general_operand" "=dx")
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=dx")
(udiv:SI (match_operand:SI 1 "general_operand" "0")
(match_operand:SI 2 "general_operand" "dx")))
- (set (match_operand:SI 3 "general_operand" "=&d")
+ (set (match_operand:SI 3 "nonimmediate_operand" "=&d")
(umod:SI (match_dup 1) (match_dup 2)))]
""
"*
@@ -988,10 +988,10 @@
[(set_attr "cc" "set_zn")])
(define_insn "divmodsi4"
- [(set (match_operand:SI 0 "general_operand" "=dx")
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=dx")
(div:SI (match_operand:SI 1 "general_operand" "0")
(match_operand:SI 2 "general_operand" "dx")))
- (set (match_operand:SI 3 "general_operand" "=d")
+ (set (match_operand:SI 3 "nonimmediate_operand" "=d")
(mod:SI (match_dup 1) (match_dup 2)))]
""
"*
@@ -1214,7 +1214,7 @@
;; and storing the register, but they don't need a scratch register
;; which may allow for better code generation.
(define_insn ""
- [(set (match_operand:QI 0 "general_operand" "=R,d") (const_int 0))]
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=R,d") (const_int 0))]
""
"@
bclr 255,%A0
@@ -1222,7 +1222,7 @@
[(set_attr "cc" "clobber")])
(define_insn ""
- [(set (match_operand:QI 0 "general_operand" "=R,d") (const_int -1))]
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=R,d") (const_int -1))]
""
"@
bset 255,%A0
@@ -1230,7 +1230,7 @@
[(set_attr "cc" "clobber,none_0hit")])
(define_insn ""
- [(set (match_operand:QI 0 "general_operand" "+R,d")
+ [(set (match_operand:QI 0 "nonimmediate_operand" "+R,d")
(subreg:QI
(and:SI (subreg:SI (match_dup 0) 0)
(match_operand:SI 1 "const_int_operand" "i,i")) 0))]
@@ -1241,7 +1241,7 @@
[(set_attr "cc" "clobber,set_znv")])
(define_insn ""
- [(set (match_operand:QI 0 "general_operand" "+R,d")
+ [(set (match_operand:QI 0 "nonimmediate_operand" "+R,d")
(subreg:QI
(ior:SI (subreg:SI (match_dup 0) 0)
(match_operand:SI 1 "const_int_operand" "i,i")) 0))]
@@ -1595,7 +1595,7 @@
"")
(define_insn ""
- [(set (match_operand:SI 0 "general_operand" "=dx,dx,dx,!dax,!dax,!dax")
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,dx,!dax,!dax,!dax")
(zero_extend:SI
(match_operand:QI 1 "general_operand" "0,dax,m,0,dax,m")))]
"TARGET_AM33"
@@ -1609,7 +1609,7 @@
[(set_attr "cc" "none_0hit")])
(define_insn ""
- [(set (match_operand:SI 0 "general_operand" "=dx,dx,dx")
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,dx")
(zero_extend:SI
(match_operand:QI 1 "general_operand" "0,d,m")))]
""
@@ -1627,7 +1627,7 @@
"")
(define_insn ""
- [(set (match_operand:SI 0 "general_operand" "=dx,dx,dx,!dax,!dax,!dax")
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,dx,!dax,!dax,!dax")
(zero_extend:SI
(match_operand:HI 1 "general_operand" "0,dax,m,0,dax,m")))]
"TARGET_AM33"
@@ -1641,7 +1641,7 @@
[(set_attr "cc" "none_0hit")])
(define_insn ""
- [(set (match_operand:SI 0 "general_operand" "=dx,dx,dx")
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,dx")
(zero_extend:SI
(match_operand:HI 1 "general_operand" "0,dx,m")))]
""
@@ -1661,7 +1661,7 @@
"")
(define_insn ""
- [(set (match_operand:SI 0 "general_operand" "=dx,dx,!dax,!dax")
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,!dax,!dax")
(sign_extend:SI
(match_operand:QI 1 "general_operand" "0,dx,0,dax")))]
"TARGET_AM33"
@@ -1673,7 +1673,7 @@
[(set_attr "cc" "none_0hit")])
(define_insn ""
- [(set (match_operand:SI 0 "general_operand" "=dx,dx")
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx")
(sign_extend:SI
(match_operand:QI 1 "general_operand" "0,dx")))]
""
@@ -1690,7 +1690,7 @@
"")
(define_insn ""
- [(set (match_operand:SI 0 "general_operand" "=dx,dx,!dax,!dax")
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,!dax,!dax")
(sign_extend:SI
(match_operand:HI 1 "general_operand" "0,dax,0,dax")))]
"TARGET_AM33"
@@ -1702,7 +1702,7 @@
[(set_attr "cc" "none_0hit")])
(define_insn ""
- [(set (match_operand:SI 0 "general_operand" "=dx,dx")
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx")
(sign_extend:SI
(match_operand:HI 1 "general_operand" "0,dx")))]
""
--
Alexandre Oliva Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
Red Hat GCC Developer aoliva@{cygnus.com, redhat.com}
CS PhD student at IC-Unicamp oliva@{lsd.ic.unicamp.br, gnu.org}
Free Software Evangelist *Please* write to mailing lists, not to me