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Re: Patch to allow dwatf2out_frame_debug_expr() to handle ARM stack frames


>   The current sources are failing to build libgcc for the arm-elf
>   target because the DWARF2 debug generation code cannot handle the
>   ARM method for generating stack frames.
> 
>   The ARM backend uses a temporary register to hold the stack pointer
>   value (1) before it pushes registers into the frame and then it
>   copies a modified form of this register into the frame pointer (3):
> 
>     (set (reg:SI 12 ip) (reg:SI 13 sp))                         <--- 1
>     (set (mem:SI (pre_dec (reg:SI 13 sp))) (reg:SI 15 pc))
>     (set (mem:SI (pre_dec (reg:SI 13 sp))) (reg:SI 14 lr))
>     (set (mem:SI (pre_dec (reg:SI 13 sp))) (reg:SI 12 ip))      <--- 2
>     (set (mem:SI (pre_dec (reg:SI 13 sp))) (reg:SI 11 fp))
>     (set (mem:SI (pre_dec (reg:SI 13 sp))) (reg:SI  8 r8))
>     (set (mem:SI (pre_dec (reg:SI 13 sp))) (reg:SI  7 r7))
>     (set (mem:SI (pre_dec (reg:SI 13 sp))) (reg:SI  6 r6))
>     (set (mem:SI (pre_dec (reg:SI 13 sp))) (reg:SI  5 r5))
>     (set (mem:SI (pre_dec (reg:SI 13 sp))) (reg:SI  4 r4))
>     (set (reg:SI 11 fp) (plus:SI (reg:SI 12 ip) (const_int -4])) <-- 3
> 
>   The code in dwarf2out_frame_debug_expr() notices the push of the IP
>   register (2) (which is now the CFA register) and aborts because it
>   cannot handle the PRE_DEC addressing mode.
> 
>   Even if this is fixed however, the code still fails because the code
>   that handles (2) resets the CFA back to the stack pointer (and sets
>   the 'indirect' flag), but when the code to handle (3) is triggered,
>   it sees that the frame pointer is being set from a register which is
>   (no longer) the CFA and so aborts.
> 
>   The patch below fixes both of these problems, and allows the arm-elf
>   toolchain to build.  It allows the code that handles MEMs to accept
>   PRE_DEC addressing, (as well as PRE_INC, POST_INC and POST_DEC).  It
>   also tells the code the handle setting the frame pointer that if
>   indirect addressing has been triggerd, any source register is
>   permissable.

My initial reaction is that the code to handle pre/post inc/dec is ok, but 
I'm uncomfortable with simply disabling the check on the CFA register when 
indirect is set.  The code worked ok (or, at least, it seemed to) before 
Jason added the indirect flag, so the question that needs to be answered 
first is: how and why does indirect change things? and is it right for the 
ARM?

R.



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