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RE: [patch] gcc/config/h8300/h8300.md
- To: "'gcc-patches at gcc dot gnu dot org'" <gcc-patches at gcc dot gnu dot org>
- Subject: RE: [patch] gcc/config/h8300/h8300.md
- From: Kazu Hirata <kazu at hxi dot com>
- Date: Wed, 21 Jun 2000 14:50:56 -0400
Hi Jeff,
> Hmmm, I didn't think caller-save used push/pop insns to save/restore
> registers around calls. I thought it used simple stores.
>
> I'd be very surprised if this change was useful for caller-saves. Can
> you show me precisely how we're getting "push" instructions instead of
> "mov" instructions.
/* h8300-hms-gcc -ms -O2 -fomit-frame-pointer */
typedef long elm;
elm ret1 ();
elm arg7 (elm a, elm b, elm c, elm d, elm e, elm f, elm g);
void
test2 ()
{
elm a = ret1 ();
elm b = ret1 ();
elm c = ret1 ();
elm d = ret1 ();
elm e = ret1 ();
elm f = ret1 ();
elm g = ret1 ();
arg7 (a, b, c, d, e, f, g);
}
The above code example compiles to the following. By the way, on H8 in
general, "push.l er0" is an alias for "mov.l er0,@-sp", where sp is an alias
for er7.
There is one drawback. If you change "typedef long elm" to "typedef int
elm", then the peephole optimization does not work because it requires a
sequence of SI pushes with no HI push mixed in. On H8/300H and H8/S,
movqi_push, movhi_push, and movsi_push all translate to push.l, but of
course, their rtx'es are all different. So, the optimization seems
impossible unless you write out all possible combinations of pushes. Is
there any clever way?
; -O2
.h8300s
.file "gccbug2.c"
.section .text
.align 1
.global _test2
_test2:
sub #12,sp
stm.l er4-er6,@-sp
jsr @_ret1
mov.l er0,@(20,er7)
jsr @_ret1
mov.l er0,@(16,er7)
jsr @_ret1
mov.l er0,@(12,er7)
jsr @_ret1
mov.l er0,er6
jsr @_ret1
mov.l er0,er5
jsr @_ret1
mov.l er0,er4
jsr @_ret1
mov.l er0,@-er7
stm.w er4-er6,@-sp ; this used to be push.l er4, push.l er5,
push.l er6
mov.l @(28,er7),er2
mov.l @(32,er7),er1
mov.l @(36,er7),er0
jsr @_arg7
add.l #16,er7
ldm.l @sp+,er4-er6
add #12,sp
rts
.end
Kazu Hirata