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arm.[ch] tidy ups.
- To: gcc-patches at gcc dot gnu dot org
- Subject: arm.[ch] tidy ups.
- From: Nick Clifton <nickc at cygnus dot com>
- Date: Mon, 10 Apr 2000 20:08:02 -0700
Hi Guys,
I am going to check in the patch below which fixes a few compile
time warnings and errors when building gcc for arm-pe.
One possibly interesting thing is that I have created two new macros
HOST_INT and HOST_UINT which can be used to specify host sized
integers. This not only saves space in the sources but also allows
us to eliminate the compile time warning about the behaviour of
unsuffixed integer constants under K&R compilers.
Cheers
Nick
2000-04-10 Nick Clifton <nickc@cygnus.com>
* config/arm/arm.h (HOST_INT): New macro: Declare a HOST_WIDE_INT
integer.
(HOST_UINT): New macro: Declare an unsigned HOST_WIDE_INT
integer.
(ARM_SIGN_EXTEND): Use HOST_UINT.
(STRIP_NAME_ENCODING): Prevent warnings about redefinitions.
(ASM_OUTPUT_LABELREF): Prevent warnings about redefinitions.
(INCOMING_RETURN_ADDR_RTX): Only define if Dwarf2 is supported.
(DWARF_FRAME_RETURN_COLUMN): Only define if Dwarf2 is supported.
* config/arm/arm.c: (const_ok_for_arm): Use HOST_UINT.
(arm_gen_constant): Use HOST_UINT.
(arm_canonicalize_constant): Use HOST_UINT.
(arm_reload_in_hi): Use HOST_UINT.
(arm_reload_out_hi): Use HOST_UINT.
(output_multi_immediate): Use HOST_UINT.
(int_log2): Use HOST_UINT.
(arm_poke_function_name): Use HOST_UINT.
(arm_output_epilogue): Use arm_volatile_func().
(output_thumb_prologue): Use arm_strip_name_encoding().
Index: arm.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/arm/arm.h,v
retrieving revision 1.70
diff -p -w -r1.70 arm.h
*** arm.h 2000/04/09 20:13:21 1.70
--- arm.h 2000/04/11 02:55:10
*************** enum reg_class
*** 1217,1225 ****
else \
break; \
\
! high = ((((val - low) & (unsigned long)0xffffffff) \
! ^ (unsigned long)0x80000000) \
! - (unsigned long)0x80000000); \
/* Check for overflow or zero */ \
if (low == 0 || high == 0 || (high + low != val)) \
break; \
--- 1217,1225 ----
else \
break; \
\
! high = ((((val - low) & HOST_UINT (0xffffffff)) \
! ^ HOST_UINT (0x80000000)) \
! - HOST_UINT (0x80000000)); \
/* Check for overflow or zero */ \
if (low == 0 || high == 0 || (high + low != val)) \
break; \
*************** typedef struct
*** 1840,1850 ****
--- 1840,1852 ----
/* This has to be handled by a function because more than part of the
ARM backend uses funciton name prefixes to encode attributes. */
+ #undef STRIP_NAME_ENCODING
#define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \
(VAR) = arm_strip_name_encoding (SYMBOL_NAME)
/* This is how to output a reference to a user-level label named NAME.
`assemble_name' uses this. */
+ #undef ASM_OUTPUT_LABELREF
#define ASM_OUTPUT_LABELREF(FILE, NAME) \
fprintf (FILE, "%s%s", USER_LABEL_PREFIX, arm_strip_name_encoding (NAME))
*************** extern int making_const_table;
*** 2628,2644 ****
|| (TARGET_ARM && (CODE == '?')) \
|| (TARGET_THUMB && (CODE == '_')))
-
/* Output an operand of an instruction. */
#define PRINT_OPERAND(STREAM, X, CODE) \
arm_print_operand (STREAM, X, CODE)
#define ARM_SIGN_EXTEND(x) ((HOST_WIDE_INT) \
(HOST_BITS_PER_WIDE_INT <= 32 ? (x) \
! : (((x) & (unsigned HOST_WIDE_INT) 0xffffffff) | \
! (((x) & (unsigned HOST_WIDE_INT) 0x80000000) \
! ? ((~ (HOST_WIDE_INT) 0) \
! & ~ (unsigned HOST_WIDE_INT) 0xffffffff) \
: 0))))
/* Output the address of an operand. */
--- 2630,2655 ----
|| (TARGET_ARM && (CODE == '?')) \
|| (TARGET_THUMB && (CODE == '_')))
/* Output an operand of an instruction. */
#define PRINT_OPERAND(STREAM, X, CODE) \
arm_print_operand (STREAM, X, CODE)
+ /* Create an [unsigned] host sized integer declaration that
+ avoids compiler warnings. */
+ #ifdef __STDC__
+ #define HOST_INT(x) ((signed HOST_WIDE_INT) x##UL)
+ #define HOST_UINT(x) ((unsigned HOST_WIDE_INT) x##UL)
+ #else
+ #define HOST_INT(x) ((HOST_WIDE_INT) x)
+ #define HOST_UINT(x) ((unsigned HOST_WIDE_INT) x)
+ #endif
+
#define ARM_SIGN_EXTEND(x) ((HOST_WIDE_INT) \
(HOST_BITS_PER_WIDE_INT <= 32 ? (x) \
! : (((x) & HOST_UINT (0xffffffff)) | \
! (((x) & HOST_UINT (0x80000000)) \
! ? ((~ HOST_INT (0)) \
! & ~ HOST_UINT(0xffffffff)) \
: 0))))
/* Output the address of an operand. */
*************** extern int making_const_table;
*** 2814,2825 ****
when running in 26-bit mode. */
#define RETURN_ADDR_MASK26 (0x03fffffc)
/* Pick up the return address upon entry to a procedure. Used for
dwarf2 unwind information. This also enables the table driven
mechanism. */
-
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LR_REGNUM)
#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNUM)
/* Used to mask out junk bits from the return address, such as
processor state, interrupt status, condition codes and the like. */
--- 2825,2837 ----
when running in 26-bit mode. */
#define RETURN_ADDR_MASK26 (0x03fffffc)
+ #ifdef DWARF2_DEBUGGING_INFO
/* Pick up the return address upon entry to a procedure. Used for
dwarf2 unwind information. This also enables the table driven
mechanism. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LR_REGNUM)
#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNUM)
+ #endif
/* Used to mask out junk bits from the return address, such as
processor state, interrupt status, condition codes and the like. */
Index: arm.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/arm/arm.c,v
retrieving revision 1.92
diff -p -w -r1.92 arm.c
*** arm.c 2000/04/08 14:29:52 1.92
--- arm.c 2000/04/11 02:55:11
*************** int
*** 722,735 ****
const_ok_for_arm (i)
HOST_WIDE_INT i;
{
! unsigned HOST_WIDE_INT mask = ~(unsigned HOST_WIDE_INT)0xFF;
/* For machines with >32 bit HOST_WIDE_INT, the bits above bit 31 must
be all zero, or all one. */
! if ((i & ~(unsigned HOST_WIDE_INT) 0xffffffff) != 0
! && ((i & ~(unsigned HOST_WIDE_INT) 0xffffffff)
! != ((~(unsigned HOST_WIDE_INT) 0)
! & ~(unsigned HOST_WIDE_INT) 0xffffffff)))
return FALSE;
/* Fast return for 0 and powers of 2 */
--- 722,735 ----
const_ok_for_arm (i)
HOST_WIDE_INT i;
{
! unsigned HOST_WIDE_INT mask = ~ HOST_UINT (0xFF);
/* For machines with >32 bit HOST_WIDE_INT, the bits above bit 31 must
be all zero, or all one. */
! if ((i & ~ HOST_UINT (0xffffffff)) != 0
! && ((i & ~ HOST_UINT (0xffffffff))
! != ((~ HOST_UINT (0))
! & ~ HOST_UINT (0xffffffff))))
return FALSE;
/* Fast return for 0 and powers of 2 */
*************** const_ok_for_arm (i)
*** 738,749 ****
do
{
! if ((i & mask & (unsigned HOST_WIDE_INT) 0xffffffff) == 0)
return TRUE;
mask =
! (mask << 2) | ((mask & (unsigned HOST_WIDE_INT) 0xffffffff)
! >> (32 - 2)) | ~((unsigned HOST_WIDE_INT) 0xffffffff);
! } while (mask != ~(unsigned HOST_WIDE_INT) 0xFF);
return FALSE;
}
--- 738,749 ----
do
{
! if ((i & mask & HOST_UINT (0xffffffff)) == 0)
return TRUE;
mask =
! (mask << 2) | ((mask & HOST_UINT (0xffffffff))
! >> (32 - 2)) | ~(HOST_UINT (0xffffffff));
! } while (mask != ~ HOST_UINT (0xFF));
return FALSE;
}
*************** arm_gen_constant (code, mode, val, targe
*** 863,869 ****
int set_zero_bit_copies = 0;
int insns = 0;
unsigned HOST_WIDE_INT temp1, temp2;
! unsigned HOST_WIDE_INT remainder = val & (unsigned HOST_WIDE_INT)0xffffffff;
/* Find out which operations are safe for a given CODE. Also do a quick
check for degenerate cases; these can occur when DImode operations
--- 863,869 ----
int set_zero_bit_copies = 0;
int insns = 0;
unsigned HOST_WIDE_INT temp1, temp2;
! unsigned HOST_WIDE_INT remainder = val & HOST_UINT (0xffffffff);
/* Find out which operations are safe for a given CODE. Also do a quick
check for degenerate cases; these can occur when DImode operations
*************** arm_gen_constant (code, mode, val, targe
*** 882,888 ****
break;
case IOR:
! if (remainder == (unsigned HOST_WIDE_INT)0xffffffff)
{
if (generate)
emit_insn (gen_rtx_SET (VOIDmode, target,
--- 882,888 ----
break;
case IOR:
! if (remainder == HOST_UINT (0xffffffff))
{
if (generate)
emit_insn (gen_rtx_SET (VOIDmode, target,
*************** arm_gen_constant (code, mode, val, targe
*** 906,912 ****
emit_insn (gen_rtx_SET (VOIDmode, target, const0_rtx));
return 1;
}
! if (remainder == (unsigned HOST_WIDE_INT)0xffffffff)
{
if (reload_completed && rtx_equal_p (target, source))
return 0;
--- 906,912 ----
emit_insn (gen_rtx_SET (VOIDmode, target, const0_rtx));
return 1;
}
! if (remainder == HOST_UINT (0xffffffff))
{
if (reload_completed && rtx_equal_p (target, source))
return 0;
*************** arm_gen_constant (code, mode, val, targe
*** 926,932 ****
emit_insn (gen_rtx_SET (VOIDmode, target, source));
return 1;
}
! if (remainder == (unsigned HOST_WIDE_INT)0xffffffff)
{
if (generate)
emit_insn (gen_rtx_SET (VOIDmode, target,
--- 926,932 ----
emit_insn (gen_rtx_SET (VOIDmode, target, source));
return 1;
}
! if (remainder == HOST_UINT (0xffffffff))
{
if (generate)
emit_insn (gen_rtx_SET (VOIDmode, target,
*************** arm_gen_constant (code, mode, val, targe
*** 1054,1069 ****
word. We only look for the simplest cases, to do more would cost
too much. Be careful, however, not to generate this when the
alternative would take fewer insns. */
! if (val & (unsigned HOST_WIDE_INT)0xffff0000)
{
! temp1 = remainder & (unsigned HOST_WIDE_INT)0xffff0000;
temp2 = remainder & 0x0000ffff;
/* Overlaps outside this range are best done using other methods. */
for (i = 9; i < 24; i++)
{
if ((((temp2 | (temp2 << i))
! & (unsigned HOST_WIDE_INT)0xffffffff) == remainder)
&& ! const_ok_for_arm (temp2))
{
rtx new_src = (subtargets
--- 1054,1069 ----
word. We only look for the simplest cases, to do more would cost
too much. Be careful, however, not to generate this when the
alternative would take fewer insns. */
! if (val & HOST_UINT (0xffff0000))
{
! temp1 = remainder & HOST_UINT (0xffff0000);
temp2 = remainder & 0x0000ffff;
/* Overlaps outside this range are best done using other methods. */
for (i = 9; i < 24; i++)
{
if ((((temp2 | (temp2 << i))
! & HOST_UINT (0xffffffff)) == remainder)
&& ! const_ok_for_arm (temp2))
{
rtx new_src = (subtargets
*************** arm_gen_constant (code, mode, val, targe
*** 1201,1211 ****
/* See if two shifts will do 2 or more insn's worth of work. */
if (clear_sign_bit_copies >= 16 && clear_sign_bit_copies < 24)
{
! HOST_WIDE_INT shift_mask = ((((unsigned HOST_WIDE_INT)0xffffffff)
<< (32 - clear_sign_bit_copies))
! & (unsigned HOST_WIDE_INT)0xffffffff);
! if ((remainder | shift_mask) != (unsigned HOST_WIDE_INT)0xffffffff)
{
if (generate)
{
--- 1201,1211 ----
/* See if two shifts will do 2 or more insn's worth of work. */
if (clear_sign_bit_copies >= 16 && clear_sign_bit_copies < 24)
{
! HOST_WIDE_INT shift_mask = (((HOST_UINT (0xffffffff))
<< (32 - clear_sign_bit_copies))
! & HOST_UINT (0xffffffff));
! if ((remainder | shift_mask) != HOST_UINT (0xffffffff))
{
if (generate)
{
*************** arm_gen_constant (code, mode, val, targe
*** 1238,1244 ****
{
HOST_WIDE_INT shift_mask = (1 << clear_zero_bit_copies) - 1;
! if ((remainder | shift_mask) != (unsigned HOST_WIDE_INT)0xffffffff)
{
if (generate)
{
--- 1238,1244 ----
{
HOST_WIDE_INT shift_mask = (1 << clear_zero_bit_copies) - 1;
! if ((remainder | shift_mask) != HOST_UINT (0xffffffff))
{
if (generate)
{
*************** arm_gen_constant (code, mode, val, targe
*** 1280,1288 ****
num_bits_set++;
if (code == AND || (can_invert && num_bits_set > 16))
! remainder = (~remainder) & (unsigned HOST_WIDE_INT)0xffffffff;
else if (code == PLUS && num_bits_set > 16)
! remainder = (-remainder) & (unsigned HOST_WIDE_INT)0xffffffff;
else
{
can_invert = 0;
--- 1280,1288 ----
num_bits_set++;
if (code == AND || (can_invert && num_bits_set > 16))
! remainder = (~remainder) & HOST_UINT (0xffffffff);
else if (code == PLUS && num_bits_set > 16)
! remainder = (-remainder) & HOST_UINT (0xffffffff);
else
{
can_invert = 0;
*************** arm_canonicalize_comparison (code, op1)
*** 1406,1412 ****
case GT:
case LE:
! if (i != ((((unsigned HOST_WIDE_INT) 1) << (HOST_BITS_PER_WIDE_INT - 1))
- 1)
&& (const_ok_for_arm (i+1) || const_ok_for_arm (- (i+1))))
{
--- 1406,1412 ----
case GT:
case LE:
! if (i != (((HOST_UINT (1)) << (HOST_BITS_PER_WIDE_INT - 1))
- 1)
&& (const_ok_for_arm (i+1) || const_ok_for_arm (- (i+1))))
{
*************** arm_canonicalize_comparison (code, op1)
*** 1417,1423 ****
case GE:
case LT:
! if (i != (((unsigned HOST_WIDE_INT) 1) << (HOST_BITS_PER_WIDE_INT - 1))
&& (const_ok_for_arm (i-1) || const_ok_for_arm (- (i-1))))
{
*op1 = GEN_INT (i-1);
--- 1417,1423 ----
case GE:
case LT:
! if (i != ((HOST_UINT (1)) << (HOST_BITS_PER_WIDE_INT - 1))
&& (const_ok_for_arm (i-1) || const_ok_for_arm (- (i-1))))
{
*op1 = GEN_INT (i-1);
*************** arm_canonicalize_comparison (code, op1)
*** 1427,1433 ****
case GTU:
case LEU:
! if (i != ~((unsigned HOST_WIDE_INT) 0)
&& (const_ok_for_arm (i+1) || const_ok_for_arm (- (i+1))))
{
*op1 = GEN_INT (i + 1);
--- 1427,1433 ----
case GTU:
case LEU:
! if (i != ~ (HOST_UINT (0))
&& (const_ok_for_arm (i+1) || const_ok_for_arm (- (i+1))))
{
*op1 = GEN_INT (i + 1);
*************** arm_rtx_costs (x, code, outer)
*** 2306,2312 ****
if (GET_CODE (XEXP (x, 1)) == CONST_INT)
{
unsigned HOST_WIDE_INT i = (INTVAL (XEXP (x, 1))
! & (unsigned HOST_WIDE_INT) 0xffffffff);
int add_cost = const_ok_for_arm (i) ? 4 : 8;
int j;
--- 2306,2312 ----
if (GET_CODE (XEXP (x, 1)) == CONST_INT)
{
unsigned HOST_WIDE_INT i = (INTVAL (XEXP (x, 1))
! & HOST_UINT (0xffffffff));
int add_cost = const_ok_for_arm (i) ? 4 : 8;
int j;
*************** arm_reload_in_hi (operands)
*** 4360,4368 ****
if (lo == 4095)
lo &= 0x7ff;
! hi = ((((offset - lo) & (HOST_WIDE_INT) 0xffffffff)
! ^ (HOST_WIDE_INT) 0x80000000)
! - (HOST_WIDE_INT) 0x80000000);
if (hi + lo != offset)
abort ();
--- 4360,4368 ----
if (lo == 4095)
lo &= 0x7ff;
! hi = ((((offset - lo) & HOST_INT (0xffffffff))
! ^ HOST_INT (0x80000000))
! - HOST_INT (0x80000000));
if (hi + lo != offset)
abort ();
*************** arm_reload_out_hi (operands)
*** 4506,4514 ****
if (lo == 4095)
lo &= 0x7ff;
! hi = ((((offset - lo) & (HOST_WIDE_INT) 0xffffffff)
! ^ (HOST_WIDE_INT) 0x80000000)
! - (HOST_WIDE_INT) 0x80000000);
if (hi + lo != offset)
abort ();
--- 4506,4514 ----
if (lo == 4095)
lo &= 0x7ff;
! hi = ((((offset - lo) & HOST_INT (0xffffffff))
! ^ HOST_INT (0x80000000))
! - HOST_INT (0x80000000));
if (hi + lo != offset)
abort ();
*************** output_multi_immediate (operands, instr1
*** 6227,6233 ****
HOST_WIDE_INT n;
{
#if HOST_BITS_PER_WIDE_INT > 32
! n &= (unsigned HOST_WIDE_INT)0xffffffff;
#endif
if (n == 0)
--- 6226,6232 ----
HOST_WIDE_INT n;
{
#if HOST_BITS_PER_WIDE_INT > 32
! n &= HOST_UINT (0xffffffff);
#endif
if (n == 0)
*************** int_log2 (power)
*** 6375,6381 ****
{
HOST_WIDE_INT shift = 0;
! while (((((HOST_WIDE_INT) 1) << shift) & power) == 0)
{
if (shift > 31)
abort ();
--- 6374,6380 ----
{
HOST_WIDE_INT shift = 0;
! while ((((HOST_INT (1)) << shift) & power) == 0)
{
if (shift > 31)
abort ();
*************** arm_poke_function_name (stream, name)
*** 6823,6829 ****
ASM_OUTPUT_ASCII (stream, name, length);
ASM_OUTPUT_ALIGN (stream, 2);
! x = GEN_INT (((unsigned HOST_WIDE_INT)0xff000000) + alignlength);
ASM_OUTPUT_INT (stream, x);
}
--- 6822,6828 ----
ASM_OUTPUT_ASCII (stream, name, length);
ASM_OUTPUT_ALIGN (stream, 2);
! x = GEN_INT (HOST_UINT(0xff000000) + alignlength);
ASM_OUTPUT_INT (stream, x);
}
*************** arm_output_epilogue ()
*** 6925,6932 ****
int frame_size = get_frame_size ();
rtx eh_ofs = cfun->machine->eh_epilogue_sp_ofs;
FILE * f = asm_out_file;
! int volatile_func = (optimize > 0
! && TREE_THIS_VOLATILE (current_function_decl));
int return_regnum;
if (use_return_insn (FALSE) && return_used_this_function)
--- 6924,6930 ----
int frame_size = get_frame_size ();
rtx eh_ofs = cfun->machine->eh_epilogue_sp_ofs;
FILE * f = asm_out_file;
! int volatile_func = arm_volatile_func ();
int return_regnum;
if (use_return_insn (FALSE) && return_used_this_function)
*************** output_thumb_prologue (f)
*** 9210,9216 ****
asm_fprintf (f, "\t.code\t16\n");
#ifdef ARM_PE
if (arm_dllexport_name_p (name))
! name = ARM_STRIP_NAME_ENCODING (name);
#endif
asm_fprintf (f, "\t.globl %s%U%s\n", STUB_NAME, name);
asm_fprintf (f, "\t.thumb_func\n");
--- 9207,9213 ----
asm_fprintf (f, "\t.code\t16\n");
#ifdef ARM_PE
if (arm_dllexport_name_p (name))
! name = arm_strip_name_encoding (name);
#endif
asm_fprintf (f, "\t.globl %s%U%s\n", STUB_NAME, name);
asm_fprintf (f, "\t.thumb_func\n");