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ix86 qi/hi to si mode promoting patch.
- To: egcs-patches at egcs dot cygnus dot com, rth at cygnus dot com
- Subject: ix86 qi/hi to si mode promoting patch.
- From: Jan Hubicka <hubicka at atrey dot karlin dot mff dot cuni dot cz>
- Date: Mon, 28 Feb 2000 15:39:43 +0100
Hi
I've done an experiment with PROMOTE_MODE macro on ix86. The results was very
interesting. After fixing some problems with partial register stall on loading
HImodes and disabling all HImode patterns, I've reached overall 18% speedup in
the integer index of byte benchmark (and consistent speedups over egcs
benchmark suite) as well as code size improvements on -mcpu=pentiumpro code.
This is rather surprising. I've tracked down some purposes such slow
results in non-promoting compilation - these are mostly due to partial
register stalls in mul instruction, suboptimal instruction choice in move
pattern and decoder stalls in HImode instructions with immediates.
By fixing these problems I was able to increase the integer index of byte
benchmark from 9.0 to 10.6. Originally I was getting index 10.4 with
promoting, but these fixes improved it to 10.9, so resulting code is still
faster and shorter. (40KB versus 38KB)
As interesting efect, I am getting better results when they use short/char
compared to int now. This is interesting.
I've decided to send the patch for promoting. I still believe, that it is not
correct way to handle HImode calculations on Intel, but it has proved to be
usefull tunning tool. I am enabling it by default on PPro. I've measured
overall neutral results on Pentium (in the byte benchark, there was up to 40%
difference in individual tests, but overall they has eliminated). On K6 and
Athlon I would expect this strategy to be interesting too, since unline
Pentium, movzx are cheap there.
I believe that most speedups are now due to avoided prefixes in spilling
himodes to stack. It would be nice to reach this w/o extra movzx overhead.
(IE teach reload and stuff to use SImode stack slots).
One way I think it would be reachable is to change rtl generation strategy
in promoting.
Currently the values are kept sign/zero extended in the larger registers.
Alternative strategy is to keep more significant halves "undefined"
and emit movzx/movsx instructions before instructions that require them.
These instructions are prety rare and since i386 have HImode patterns,
on non-partial register stalls we can use the HImode instructions when
profitable. So this should not bring any extra movzx/movsx instructions,
but I am not sure how CSE/loop code would like this.
Honza
Mon Feb 28 15:19:02 MET 2000 Jan Hubicka <jh@suse.cz>
* i386.md (all HI and QI mode non-move patterns): Conditionize
by TARGET_[HQ]IMODE_MATH.
* i386.h (x86_himode_math, x86_qimode_math, x86_promote_hi_regs,
x86_promote_qi_regs): Declare.
(TARGET_HIMODE_MATH, TARGET_QIMODE_MATH, TARGET_PROMOTE_HI_REGS,
TARGET_PROMOTE_QI_REGS): New macros.
(PROMOTE_MODE): New macro.
* i386.c (x86_himode_math, x86_qimode_math, x86_promote_hi_regs,
x86_promote_qi_regs): New global variables.
*** /home3/hubicka/egcs/gcc/config/i386/i386.md Mon Feb 28 12:14:39 2000
--- i386.md Mon Feb 28 15:14:31 2000
***************
*** 900,906 ****
[(set (reg:CC 17)
(compare:CC (match_operand:QI 0 "general_operand" "")
(match_operand:QI 1 "general_operand" "")))]
! ""
"
{
if ((GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
--- 903,909 ----
[(set (reg:CC 17)
(compare:CC (match_operand:QI 0 "general_operand" "")
(match_operand:QI 1 "general_operand" "")))]
! "TARGET_QIMODE_MATH"
"
{
if ((GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
***************
*** 3406,3412 ****
(plus:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))])]
! ""
"ix86_expand_binary_operator (PLUS, HImode, operands); DONE;")
;; %%% After Dave's SUBREG_BYTE stuff goes in, re-enable incb %ah
--- 3450,3456 ----
(plus:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))])]
! "TARGET_HIMODE_MATH"
"ix86_expand_binary_operator (PLUS, HImode, operands); DONE;")
;; %%% After Dave's SUBREG_BYTE stuff goes in, re-enable incb %ah
***************
*** 3508,3514 ****
(plus:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 17))])]
! ""
"ix86_expand_binary_operator (PLUS, QImode, operands); DONE;")
;; %%% Potential partial reg stall on alternative 2. What to do?
--- 3552,3558 ----
(plus:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 17))])]
! "TARGET_QIMODE_MATH"
"ix86_expand_binary_operator (PLUS, QImode, operands); DONE;")
;; %%% Potential partial reg stall on alternative 2. What to do?
***************
*** 3806,3812 ****
(minus:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))])]
! ""
"ix86_expand_binary_operator (MINUS, HImode, operands); DONE;")
(define_insn "*subhi_1"
--- 3850,3856 ----
(minus:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))])]
! "TARGET_HIMODE_MATH"
"ix86_expand_binary_operator (MINUS, HImode, operands); DONE;")
(define_insn "*subhi_1"
***************
*** 3847,3853 ****
(minus:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 17))])]
! ""
"ix86_expand_binary_operator (MINUS, QImode, operands); DONE;")
(define_insn "*subqi_1"
--- 3891,3897 ----
(minus:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 17))])]
! "TARGET_QIMODE_MATH"
"ix86_expand_binary_operator (MINUS, QImode, operands); DONE;")
(define_insn "*subqi_1"
***************
*** 3946,3952 ****
(mult:HI (match_operand:HI 1 "register_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))])]
! ""
"")
(define_insn "*mulhi3_1"
--- 3990,3996 ----
(mult:HI (match_operand:HI 1 "register_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))])]
! "TARGET_HIMODE_MATH"
"")
(define_insn "*mulhi3_1"
***************
*** 3962,3973 ****
imul{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "imul")])
(define_insn "umulqihi3"
[(set (match_operand:HI 0 "register_operand" "=a")
(mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "%0"))
(zero_extend:HI (match_operand:QI 2 "nonimmediate_operand" "qm"))))
(clobber (reg:CC 17))]
! ""
"mul{b}\\t%2"
[(set_attr "type" "imul")])
--- 4006,4017 ----
imul{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "imul")])
(define_insn "umulqihi3"
[(set (match_operand:HI 0 "register_operand" "=a")
(mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "%0"))
(zero_extend:HI (match_operand:QI 2 "nonimmediate_operand" "qm"))))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"mul{b}\\t%2"
[(set_attr "type" "imul")])
***************
*** 3976,3982 ****
(mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "%0"))
(sign_extend:HI (match_operand:QI 2 "nonimmediate_operand" "qm"))))
(clobber (reg:CC 17))]
! ""
"imul{b}\\t%2"
[(set_attr "type" "imul")])
--- 4029,4035 ----
(mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "%0"))
(sign_extend:HI (match_operand:QI 2 "nonimmediate_operand" "qm"))))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"imul{b}\\t%2"
[(set_attr "type" "imul")])
***************
*** 4061,4067 ****
(div:QI (match_operand:HI 1 "register_operand" "0")
(match_operand:QI 2 "nonimmediate_operand" "qm")))
(clobber (reg:CC 17))]
! ""
"idiv{b}\\t%2"
[(set_attr "type" "idiv")
(set_attr "ppro_uops" "few")])
--- 4114,4120 ----
(div:QI (match_operand:HI 1 "register_operand" "0")
(match_operand:QI 2 "nonimmediate_operand" "qm")))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"idiv{b}\\t%2"
[(set_attr "type" "idiv")
(set_attr "ppro_uops" "few")])
***************
*** 4071,4077 ****
(udiv:QI (match_operand:HI 1 "register_operand" "0")
(match_operand:QI 2 "nonimmediate_operand" "qm")))
(clobber (reg:CC 17))]
! ""
"div{b}\\t%2"
[(set_attr "type" "idiv")
(set_attr "ppro_uops" "few")])
--- 4124,4130 ----
(udiv:QI (match_operand:HI 1 "register_operand" "0")
(match_operand:QI 2 "nonimmediate_operand" "qm")))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"div{b}\\t%2"
[(set_attr "type" "idiv")
(set_attr "ppro_uops" "few")])
***************
*** 4191,4197 ****
(set (match_operand:HI 3 "register_operand" "=&d")
(mod:HI (match_dup 1) (match_dup 2)))
(clobber (reg:CC 17))]
! ""
"cwtd\;idiv{w}\\t%2"
[(set_attr "type" "multi")])
--- 4244,4250 ----
(set (match_operand:HI 3 "register_operand" "=&d")
(mod:HI (match_dup 1) (match_dup 2)))
(clobber (reg:CC 17))]
! "TARGET_HIMODE_MATH"
"cwtd\;idiv{w}\\t%2"
[(set_attr "type" "multi")])
***************
*** 4245,4251 ****
(umod:HI (match_dup 1) (match_dup 2)))
(use (match_dup 4))
(clobber (reg:CC 17))])]
! ""
"operands[4] = gen_reg_rtx (HImode);")
(define_insn "*udivmodhi_noext"
--- 4298,4304 ----
(umod:HI (match_dup 1) (match_dup 2)))
(use (match_dup 4))
(clobber (reg:CC 17))])]
! "TARGET_HIMODE_MATH"
"operands[4] = gen_reg_rtx (HImode);")
(define_insn "*udivmodhi_noext"
***************
*** 4506,4512 ****
(and:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (AND, HImode, operands); DONE;")
(define_insn "*andhi_1"
--- 4559,4565 ----
(and:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_HIMODE_MATH"
"ix86_expand_binary_operator (AND, HImode, operands); DONE;")
(define_insn "*andhi_1"
***************
*** 4566,4572 ****
(and:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (AND, QImode, operands); DONE;")
;; %%% Potential partial reg stall on alternative 2. What to do?
--- 4619,4625 ----
(and:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"ix86_expand_binary_operator (AND, QImode, operands); DONE;")
;; %%% Potential partial reg stall on alternative 2. What to do?
***************
*** 4714,4720 ****
(ior:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (IOR, HImode, operands); DONE;")
(define_insn "*iorhi_1"
--- 4767,4773 ----
(ior:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_HIMODE_MATH"
"ix86_expand_binary_operator (IOR, HImode, operands); DONE;")
(define_insn "*iorhi_1"
***************
*** 4742,4748 ****
(ior:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (IOR, QImode, operands); DONE;")
;; %%% Potential partial reg stall on alternative 2. What to do?
--- 4795,4801 ----
(ior:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"ix86_expand_binary_operator (IOR, QImode, operands); DONE;")
;; %%% Potential partial reg stall on alternative 2. What to do?
***************
*** 4807,4813 ****
(xor:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (XOR, HImode, operands); DONE;")
(define_insn "*xorhi_1"
--- 4860,4866 ----
(xor:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_HIMODE_MATH"
"ix86_expand_binary_operator (XOR, HImode, operands); DONE;")
(define_insn "*xorhi_1"
***************
*** 4835,4841 ****
(xor:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (XOR, QImode, operands); DONE;")
;; %%% Potential partial reg stall on alternative 2. What to do?
--- 4888,4894 ----
(xor:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"ix86_expand_binary_operator (XOR, QImode, operands); DONE;")
;; %%% Potential partial reg stall on alternative 2. What to do?
***************
*** 4962,4968 ****
[(parallel [(set (match_operand:HI 0 "nonimmediate_operand" "")
(neg:HI (match_operand:HI 1 "nonimmediate_operand" "")))
(clobber (reg:CC 17))])]
! ""
"ix86_expand_unary_operator (NEG, HImode, operands); DONE;")
(define_insn "*neghi2_1"
--- 5015,5021 ----
[(parallel [(set (match_operand:HI 0 "nonimmediate_operand" "")
(neg:HI (match_operand:HI 1 "nonimmediate_operand" "")))
(clobber (reg:CC 17))])]
! "TARGET_HIMODE_MATH"
"ix86_expand_unary_operator (NEG, HImode, operands); DONE;")
(define_insn "*neghi2_1"
***************
*** 4997,5003 ****
[(parallel [(set (match_operand:QI 0 "nonimmediate_operand" "")
(neg:QI (match_operand:QI 1 "nonimmediate_operand" "")))
(clobber (reg:CC 17))])]
! ""
"ix86_expand_unary_operator (NEG, QImode, operands); DONE;")
(define_insn "*negqi2_1"
--- 5050,5056 ----
[(parallel [(set (match_operand:QI 0 "nonimmediate_operand" "")
(neg:QI (match_operand:QI 1 "nonimmediate_operand" "")))
(clobber (reg:CC 17))])]
! "TARGET_QIMODE_MATH"
"ix86_expand_unary_operator (NEG, QImode, operands); DONE;")
(define_insn "*negqi2_1"
***************
*** 5427,5433 ****
(define_expand "one_cmplhi2"
[(set (match_operand:HI 0 "nonimmediate_operand" "")
(not:HI (match_operand:HI 1 "nonimmediate_operand" "")))]
! ""
"ix86_expand_unary_operator (NOT, HImode, operands); DONE;")
(define_insn "*one_cmplhi2_1"
--- 5480,5486 ----
(define_expand "one_cmplhi2"
[(set (match_operand:HI 0 "nonimmediate_operand" "")
(not:HI (match_operand:HI 1 "nonimmediate_operand" "")))]
! "TARGET_HIMODE_MATH"
"ix86_expand_unary_operator (NOT, HImode, operands); DONE;")
(define_insn "*one_cmplhi2_1"
***************
*** 5465,5471 ****
(define_expand "one_cmplqi2"
[(set (match_operand:QI 0 "nonimmediate_operand" "")
(not:QI (match_operand:QI 1 "nonimmediate_operand" "")))]
! ""
"ix86_expand_unary_operator (NOT, QImode, operands); DONE;")
(define_insn "*one_cmplqi2_1"
--- 5518,5524 ----
(define_expand "one_cmplqi2"
[(set (match_operand:QI 0 "nonimmediate_operand" "")
(not:QI (match_operand:QI 1 "nonimmediate_operand" "")))]
! "TARGET_QIMODE_MATH"
"ix86_expand_unary_operator (NOT, QImode, operands); DONE;")
(define_insn "*one_cmplqi2_1"
***************
*** 5746,5752 ****
(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (ASHIFT, HImode, operands); DONE;")
(define_insn "*ashlhi3_1"
--- 5799,5805 ----
(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_HIMODE_MATH"
"ix86_expand_binary_operator (ASHIFT, HImode, operands); DONE;")
(define_insn "*ashlhi3_1"
***************
*** 5822,5828 ****
(ashift:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (ASHIFT, QImode, operands); DONE;")
;; %%% Potential partial reg stall on alternative 2. What to do?
--- 5875,5881 ----
(ashift:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"ix86_expand_binary_operator (ASHIFT, QImode, operands); DONE;")
;; %%% Potential partial reg stall on alternative 2. What to do?
***************
*** 6060,6066 ****
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (ASHIFTRT, HImode, operands); DONE;")
(define_insn "*ashrhi3_1"
--- 6113,6119 ----
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_HIMODE_MATH"
"ix86_expand_binary_operator (ASHIFTRT, HImode, operands); DONE;")
(define_insn "*ashrhi3_1"
***************
*** 6095,6101 ****
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (ASHIFTRT, QImode, operands); DONE;")
(define_insn "*ashrqi3_1"
--- 6148,6154 ----
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"ix86_expand_binary_operator (ASHIFTRT, QImode, operands); DONE;")
(define_insn "*ashrqi3_1"
***************
*** 6222,6228 ****
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (LSHIFTRT, HImode, operands); DONE;")
(define_insn "*lshrhi3_1"
--- 6275,6281 ----
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_HIMODE_MATH"
"ix86_expand_binary_operator (LSHIFTRT, HImode, operands); DONE;")
(define_insn "*lshrhi3_1"
***************
*** 6257,6263 ****
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (LSHIFTRT, QImode, operands); DONE;")
(define_insn "*lshrqi3_1"
--- 6310,6316 ----
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"ix86_expand_binary_operator (LSHIFTRT, QImode, operands); DONE;")
(define_insn "*lshrqi3_1"
***************
*** 6313,6319 ****
(rotate:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (ROTATE, HImode, operands); DONE;")
(define_insn "*rotlhi3_1"
--- 6366,6372 ----
(rotate:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_HIMODE_MATH"
"ix86_expand_binary_operator (ROTATE, HImode, operands); DONE;")
(define_insn "*rotlhi3_1"
***************
*** 6332,6338 ****
(rotate:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (ROTATE, QImode, operands); DONE;")
(define_insn "*rotlqi3_1"
--- 6385,6391 ----
(rotate:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"ix86_expand_binary_operator (ROTATE, QImode, operands); DONE;")
(define_insn "*rotlqi3_1"
***************
*** 6370,6376 ****
(rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (ROTATERT, HImode, operands); DONE;")
(define_insn "*rotrhi3"
--- 6423,6429 ----
(rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_HIMODE_MATH"
"ix86_expand_binary_operator (ROTATERT, HImode, operands); DONE;")
(define_insn "*rotrhi3"
***************
*** 6389,6395 ****
(rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! ""
"ix86_expand_binary_operator (ROTATERT, QImode, operands); DONE;")
(define_insn "*rotrqi3_1"
--- 6442,6448 ----
(rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_QIMODE_MATH"
"ix86_expand_binary_operator (ROTATERT, QImode, operands); DONE;")
(define_insn "*rotrqi3_1"
***************
*** 8715,8721 ****
(if_then_else:HI (match_operand 1 "comparison_operator" "")
(match_operand:HI 2 "nonimmediate_operand" "")
(match_operand:HI 3 "nonimmediate_operand" "")))]
! "TARGET_CMOVE"
"if (!ix86_expand_int_movcc (operands)) FAIL; DONE;")
(define_insn "*movhicc_noc"
--- 8768,8774 ----
(if_then_else:HI (match_operand 1 "comparison_operator" "")
(match_operand:HI 2 "nonimmediate_operand" "")
(match_operand:HI 3 "nonimmediate_operand" "")))]
! "TARGET_CMOVE && TARGET_HIMODE_MATH"
"if (!ix86_expand_int_movcc (operands)) FAIL; DONE;")
(define_insn "*movhicc_noc"
*** /home3/hubicka/egcs/gcc/config/i386/i386.c Mon Feb 28 12:14:31 2000
--- i386.c Mon Feb 28 15:14:13 2000
*************** const int x86_read_modify = ~(m_PENT | m
*** 214,219 ****
--- 213,222 ----
const int x86_split_long_moves = m_PPRO;
const int x86_promote_QImode = m_K6 | m_PENT | m_386 | m_486;
const int x86_single_stringop = m_386;
+ const int x86_qimode_math = ~(0);
+ const int x86_promote_qi_regs = 0;
+ const int x86_himode_math = ~(m_PPRO);
+ const int x86_promote_hi_regs = m_PPRO;
#define AT_BP(mode) (gen_rtx_MEM ((mode), hard_frame_pointer_rtx))
*** /home3/hubicka/egcs/gcc/config/i386/i386.h Mon Feb 28 12:14:35 2000
--- i386.h Mon Feb 28 15:15:07 2000
*************** extern const int x86_use_loop, x86_use_f
*** 163,168 ****
--- 166,172 ----
extern const int x86_use_cltd, x86_read_modify_write;
extern const int x86_read_modify, x86_split_long_moves;
extern const int x86_promote_QImode, x86_single_stringop;
+ extern const int x86_himode_math, x86_qimode_math, x86_promote_qi_regs;
#define TARGET_USE_LEAVE (x86_use_leave & CPUMASK)
#define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK)
*************** extern const int x86_promote_QImode, x86
*** 186,191 ****
--- 190,199 ----
#define TARGET_READ_MODIFY (x86_read_modify & CPUMASK)
#define TARGET_PROMOTE_QImode (x86_promote_QImode & CPUMASK)
#define TARGET_SINGLE_STRINGOP (x86_single_stringop & CPUMASK)
+ #define TARGET_QIMODE_MATH (x86_qimode_math & CPUMASK)
+ #define TARGET_HIMODE_MATH (x86_himode_math & CPUMASK)
+ #define TARGET_PROMOTE_QI_REGS (x86_promote_qi_regs & CPUMASK)
+ #define TARGET_PROMOTE_HI_REGS (x86_promote_hi_regs & CPUMASK)
#define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
*************** while (0)
*** 1740,1745 ****
--- 1745,1763 ----
#define PROMOTE_PROTOTYPES 1
+ /* A macro to update M and UNSIGNEDP when an object whose type is
+ TYPE and which has the specified mode and signedness is to be
+ stored in a register. This macro is only called when TYPE is a
+ scalar type.
+
+ On i386 it is sometimes usefull to promote HImode and QImode
+ quantities to SImode. The choice depends on target type. */
+
+ #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
+ if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS) \
+ || ((MODE) == QImode && TARGET_PROMOTE_QI_REGS)) \
+ (MODE) = SImode;
+
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */