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Re: 64-bit powerpc compare with constant problem
- To: David Edelsohn <dje at watson dot ibm dot com>
- Subject: Re: 64-bit powerpc compare with constant problem
- From: Gabriel Paubert <paubert at iram dot es>
- Date: Thu, 10 Feb 2000 23:48:36 +0100 (MET)
- cc: Geoff Keating <geoffk at cygnus dot com>, Benjamin Gamsa <ben at eecg dot toronto dot edu>, gcc-patches at gcc dot gnu dot org
On Thu, 10 Feb 2000, David Edelsohn wrote:
> My current patch for fixing the problem with constants in DImode
> is appended. I eventually want to add the patch to both the gcc-2.95
> release branch and the "newppc-branch".
BTW, while trying to understand how md file work, I think I spotted the
following small problems in rs6000.md (actually the 3rd one is a bug
AFAICT but I don't have any PPC64 machine to check).
Gabriel.
* rs600.md typos in length attributes for ashlsi3_* patterns
use "rK" instead or "rI" constraint for cmplw and cmpld instructions
disable SImode "*ne0" on 64 bit target since it uses the carry
*** config/rs6000/rs6000.md.orig Thu Feb 10 21:33:43 2000
--- config/rs6000/rs6000.md Thu Feb 10 21:33:07 2000
***************
*** 3149,3155 ****
"@
sle %0,%1,%2
{sli|slwi} %0,%1,%h2"
! [(set_attr "length" "8")])
(define_insn "ashlsi3_no_power"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
--- 3149,3155 ----
"@
sle %0,%1,%2
{sli|slwi} %0,%1,%h2"
! [(set_attr "length" "4")])
(define_insn "ashlsi3_no_power"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
***************
*** 3157,3163 ****
(match_operand:SI 2 "reg_or_cint_operand" "ri")))]
"! TARGET_POWER"
"{sl|slw}%I2 %0,%1,%h2"
! [(set_attr "length" "8")])
(define_insn ""
[(set (match_operand:CC 0 "cc_reg_operand" "=x,x")
--- 3157,3163 ----
(match_operand:SI 2 "reg_or_cint_operand" "ri")))]
"! TARGET_POWER"
"{sl|slw}%I2 %0,%1,%h2"
! [(set_attr "length" "4")])
(define_insn ""
[(set (match_operand:CC 0 "cc_reg_operand" "=x,x")
***************
*** 8890,8896 ****
(define_insn ""
[(set (match_operand:CCUNS 0 "cc_reg_operand" "=y")
(compare:CCUNS (match_operand:SI 1 "gpc_reg_operand" "r")
! (match_operand:SI 2 "reg_or_u_short_operand" "rI")))]
""
"{cmpl%I2|cmplw%I2} %0,%1,%W2"
[(set_attr "type" "compare")])
--- 8890,8896 ----
(define_insn ""
[(set (match_operand:CCUNS 0 "cc_reg_operand" "=y")
(compare:CCUNS (match_operand:SI 1 "gpc_reg_operand" "r")
! (match_operand:SI 2 "reg_or_u_short_operand" "rK")))]
""
"{cmpl%I2|cmplw%I2} %0,%1,%W2"
[(set_attr "type" "compare")])
***************
*** 8898,8904 ****
(define_insn ""
[(set (match_operand:CCUNS 0 "cc_reg_operand" "=y")
(compare:CCUNS (match_operand:DI 1 "gpc_reg_operand" "r")
! (match_operand:DI 2 "reg_or_u_short_operand" "rI")))]
""
"cmpld%I2 %0,%1,%W2"
[(set_attr "type" "compare")])
--- 8898,8904 ----
(define_insn ""
[(set (match_operand:CCUNS 0 "cc_reg_operand" "=y")
(compare:CCUNS (match_operand:DI 1 "gpc_reg_operand" "r")
! (match_operand:DI 2 "reg_or_u_short_operand" "rK")))]
""
"cmpld%I2 %0,%1,%W2"
[(set_attr "type" "compare")])
***************
*** 9267,9273 ****
(lshiftrt:SI (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r")))
(const_int 31)))
(clobber (match_scratch:SI 2 "=&r"))]
! "! TARGET_POWER"
"{ai|addic} %2,%1,-1\;{sfe|subfe} %0,%2,%1"
[(set_attr "length" "8")])
--- 9267,9273 ----
(lshiftrt:SI (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r")))
(const_int 31)))
(clobber (match_scratch:SI 2 "=&r"))]
! "! TARGET_POWER && ! TARGET_POWERPC64"
"{ai|addic} %2,%1,-1\;{sfe|subfe} %0,%2,%1"
[(set_attr "length" "8")])