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Re: patch to fix SH4 mode-switching problems


Joern Rennecke <amylaar@cygnus.co.uk> writes:
> > I think more like
> > 
> > `CANONICALIZE_COMPARISON (CODE, OP0, OP1)'
> >  One some machines not all possible comparisons are defined, but
> >  you can convert an invalid comparison into a valid one.  For
> >  example, the Alpha does not have a `GT' comparison, but you can
> >  use an `LT' comparison instead and swap the order of the operands.
> > 
> >  On such machines, define this macro to be a C statement to do any
> >  required conversions.  CODE is the initial comparison code and OP0
> >  and OP1 are the left and right operands of the comparison,
> >  respectively.  You should modify CODE, OP0, and OP1 as required.
> >
> >  GNU CC will not assume that the comparison resulting from this
> >  macro is valid but will see if the resulting insn matches a
> >  pattern in the `md' file.
> > 
> >  You need not define this macro if it would never change the
> >  comparison code or operands.
> 
>
> @item OPTIMIZE_MODE_SWITCHING (@var{entity})
> Define this macro if the port needs extra instructions inserted for mode
> switching in an optimizing compilation.
> 
> For an example, the SH4 can perform both single and double precision
> floating point operations, but to perform a single precision operation,
> the FPSCR PR bit has to be cleared, while for a double precision
> operation, this bit has to be set.  Changing the PR bit requires a general
> purpose register as a scratch register, hence these FPSCR sets have to
> be inserted before reload, i.e. you can't put this into instruction emitting
> or MACHINE_DEPENDENT_REORG.
> 

If we're taking votes, I found Geoff's description more informative.  His
description tells me exactly how the macro should work, while yours only tells
me about a problem that could be solved with the macro.  

				-Clint

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