This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
[PATCH] Allow FPU insns into SPARC v9 delay slots
- To: gcc-patches at gcc dot gnu dot org
- Subject: [PATCH] Allow FPU insns into SPARC v9 delay slots
- From: Jakub Jelinek <jakub at redhat dot com>
- Date: Wed, 2 Feb 2000 16:01:40 +0100
Hi!
This patch allows e.g. code like:
double bar(void);
double foo(void) { return bar() + 1.0; }
to use epilogue delay slot of the return %i7+8 instruction.
2000-02-02 Jakub Jelinek <jakub@redhat.com>
* config/sparc/sparc.c (eligible_for_epilogue_delay): Accept
floating point instructions for epilogue delay.
--- gcc/config/sparc/sparc.c.jj Wed Feb 2 10:54:47 2000
+++ gcc/config/sparc/sparc.c Wed Feb 2 15:30:21 2000
@@ -2371,9 +2371,19 @@ eligible_for_epilogue_delay (trial, slot
/* Otherwise, only operations which can be done in tandem with
a `restore' or `return' insn can go into the delay slot. */
if (GET_CODE (SET_DEST (pat)) != REG
- || REGNO (SET_DEST (pat)) >= 32
|| REGNO (SET_DEST (pat)) < 24)
return 0;
+
+ /* If this instruction sets up floating point register and we have a return
+ instruction, it can probably go in. But restore will not work
+ with FP_REGS. */
+ if (REGNO (SET_DEST (pat)) >= 32)
+ {
+ if (TARGET_V9 && ! epilogue_renumber (&pat, 1)
+ && (get_attr_in_uncond_branch_delay (trial) == IN_BRANCH_DELAY_TRUE))
+ return 1;
+ return 0;
+ }
/* The set of insns matched here must agree precisely with the set of
patterns paired with a RETURN in sparc.md. */
Cheers,
Jakub
___________________________________________________________________
Jakub Jelinek | jakub@redhat.com | http://sunsite.mff.cuni.cz/~jj
Linux version 2.3.41 on a sparc64 machine (1343.49 BogoMips)
___________________________________________________________________