Re: Patch to mn10200.md to fix bad insn generation

[Nick Clifton <nickc at cygnus dot com>]

Hi Jeff,

:   > Mon Nov 22 17:27:57 1999  Nick Clifton  <nickc@cygnus.com>
:   > 
:   > 	* config/mn10200/mn10200.md: Do not generate a movx
:   > 	instruction if the MEM is a symbolic reference.
: This seems wrong.  You're just papering over the problem.
: 
: When loading from memory:
: 
: 	mov addr,dreg  performs a 16 bit load
: 	mov addr,areg  performs a 24 bit load
:         movx addr,dreg performs a 24 bit load
: 
: Your change will turn what should be a 24bit load into a 16 bit load, that's
: certainly not was intended.

Ahh, thanks for explaining.  I had no idea what these instructions
actually did.

: The easiest way I can see to fix this is to verify that the memory address
: used in operand 1 (when operand 1 is a MEM) is a valid PSImode address.

Like the patch below ?

: Note that truncsipsi2 has the same problem and would presumably need the
: same fix.

Hmm, well I tried duplicatibng the code in the patch below for the
truncsipsi2 pattern as well, but then expr.c fails to build, because
at line 970 it tests HAVE_truncsipsi2, and this was attempting to test
GET_CODE (operands[1]), and the operands array is not visible at this
point in the compile.  I am not sure what do to about that.  Maybe the
truncsipsi pattern ought to be changed into a define_expand, and the
corresponding define_insn could have the test ?

: Another alternative would be to tweak GO_IF_LEGITIMATE_ADDRESS to disallow
: constant addresses SImode, but that's major overkill since the only time they
: cause us problems is when we're using special memory loads to truncate an
: SImode value in memory to PSImode when we want to load it into a reg.

Agreed.

The patch below does fix the problem generated by the test case, but
it does not address the problem raised by the presence of the movx
instruction in the truncsipsi pattern.  May I check this patch in
anyway ?

Cheers
	Nick


Wed Nov 24 18:10:53 1999  Nick Clifton  <nickc@cygnus.com>

	* config/mn10200/mn10200.md: Do not allow constant addresses
	when generating a shift and truncate insn.

Index: config/mn10200/mn10200.md
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/config/mn10200/mn10200.md,v
retrieving revision 1.64
diff -p -r1.64 mn10200.md
*** mn10200.md	1999/10/18 19:54:10	1.64
--- mn10200.md	1999/11/24 18:06:10
***************
*** 1787,1793 ****
  	(truncate:PSI
  	  (ashift:SI (match_operand:SI 1 "general_operand" "d,m,m,i")
  		     (match_operand:HI 2 "const_int_operand" "i,i,i,i"))))]
!   ""
    "*
  {
    int count = INTVAL (operands[2]);
--- 1787,1794 ----
  	(truncate:PSI
  	  (ashift:SI (match_operand:SI 1 "general_operand" "d,m,m,i")
  		     (match_operand:HI 2 "const_int_operand" "i,i,i,i"))))]
!   "((GET_CODE (operands [1]) != MEM)
!   || (! CONSTANT_ADDRESS_P (XEXP (operands [1], 0))))"
    "*
  {
    int count = INTVAL (operands[2]);