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latent PA bug
- To: gcc-patches at gcc dot gnu dot org
- Subject: latent PA bug
- From: Jeffrey A Law <law at cygnus dot com>
- Date: Wed, 03 Nov 1999 06:25:08 -0700
- Reply-To: law at cygnus dot com
The recent regclass upheaval exposed a latent bug in the PA backend.
movb,tr and addb,tr only operate on integer registers. For some reason
we wanted to copy (const_int 0) into an FP register in an integer mode.
This happened in a location where the PA backend thought it could combine
the copy into the FP register with an unconditional branch. This (of course)
caused some problems down the road.
* pa.c (ireg_operand): New function.
* pa.h (PREDICATE_CODES): Handle ireg_operand.
* pa.md (parallel_addb, parallel_movb): Use ireg_operand.
Fix out of date comment.
Index: pa.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/pa/pa.c,v
retrieving revision 1.67
diff -c -3 -p -r1.67 pa.c
*** pa.c 1999/10/17 23:08:36 1.67
--- pa.c 1999/11/03 13:19:59
*************** ireg_or_int5_operand (op, mode)
*** 478,483 ****
--- 478,492 ----
|| (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32));
}
+ /* Return nonzero if OP is an integer register, else return zero. */
+ int
+ ireg_operand (op, mode)
+ rtx op;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
+ {
+ return (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32);
+ }
+
/* Return truth value of whether OP is a integer which fits the
range constraining immediate operands in three-address insns. */
Index: pa.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/pa/pa.h,v
retrieving revision 1.77
diff -c -3 -p -r1.77 pa.h
*** pa.h 1999/11/02 08:50:55 1.77
--- pa.h 1999/11/03 13:20:03
*************** extern struct rtx_def *return_addr_rtx (
*** 2307,2310 ****
--- 2307,2311 ----
{"shadd_operand", {CONST_INT}}, \
{"basereg_operand", {REG}}, \
{"div_operand", {REG, CONST_INT}}, \
+ {"ireg_operand", {REG}}, \
{"movb_comparison_operator", {EQ, NE, LT, GE}},
Index: pa.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/pa/pa.md,v
retrieving revision 1.59
diff -c -3 -p -r1.59 pa.md
*** pa.md 1999/11/03 12:45:21 1.59
--- pa.md 1999/11/03 13:20:08
***************
*** 5389,5403 ****
(const_int 8)
(const_int 12)))))])
- ;; The next several patterns (parallel_addb, parallel_movb, fmpyadd and
- ;; fmpysub aren't currently used by the FSF sources, but will be soon.
- ;;
- ;; They're in the FSF tree for documentation and to make Cygnus<->FSF
- ;; merging easier.
(define_insn ""
[(set (pc) (label_ref (match_operand 3 "" "" )))
! (set (match_operand:SI 0 "register_operand" "=r")
! (plus:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "ireg_or_int5_operand" "rL")))]
"(reload_completed && operands[0] == operands[1]) || operands[0] ==
operands[2]"
"*
--- 5389,5398 ----
(const_int 8)
(const_int 12)))))])
(define_insn ""
[(set (pc) (label_ref (match_operand 3 "" "" )))
! (set (match_operand:SI 0 "ireg_operand" "=r")
! (plus:SI (match_operand:SI 1 "ireg_operand" "r")
(match_operand:SI 2 "ireg_or_int5_operand" "rL")))]
"(reload_completed && operands[0] == operands[1]) || operands[0] ==
operands[2]"
"*
***************
*** 5413,5419 ****
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
! (set (match_operand:SF 0 "register_operand" "=r")
(match_operand:SF 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*
--- 5408,5414 ----
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
! (set (match_operand:SF 0 "ireg_operand" "=r")
(match_operand:SF 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*
***************
*** 5429,5435 ****
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
! (set (match_operand:SI 0 "register_operand" "=r")
(match_operand:SI 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*
--- 5424,5430 ----
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
! (set (match_operand:SI 0 "ireg_operand" "=r")
(match_operand:SI 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*
***************
*** 5445,5451 ****
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
! (set (match_operand:HI 0 "register_operand" "=r")
(match_operand:HI 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*
--- 5440,5446 ----
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
! (set (match_operand:HI 0 "ireg_operand" "=r")
(match_operand:HI 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*
***************
*** 5461,5467 ****
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
! (set (match_operand:QI 0 "register_operand" "=r")
(match_operand:QI 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*
--- 5456,5462 ----
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
! (set (match_operand:QI 0 "ireg_operand" "=r")
(match_operand:QI 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*