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alpha some_operand update
- To: gcc-patches at gcc dot gnu dot org
- Subject: alpha some_operand update
- From: Richard Henderson <rth at cygnus dot com>
- Date: Wed, 13 Oct 1999 21:21:34 -0700
Cures the warnings I just added to genrecog about SET_DEST
operands matching CONST_INT.
r~
* alpha.c (some_ni_operand): New.
* alpha-protos.h: Declare it.
* alpha.h (PREDICATE_CODES): Update.
* alpha.md (sXaddq reload insns): Use some_ni_operand
for SET_DEST instead of some_operand.
Index: alpha-protos.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/alpha/alpha-protos.h,v
retrieving revision 1.1
diff -c -p -d -r1.1 alpha-protos.h
*** alpha-protos.h 1999/09/23 12:36:05 1.1
--- alpha-protos.h 1999/10/14 04:17:53
*************** extern int reg_or_fp0_operand PROTO ((rt
*** 50,55 ****
--- 50,56 ----
extern int hard_fp_register_operand PROTO ((rtx, enum machine_mode));
extern int reg_or_cint_operand PROTO ((rtx, enum machine_mode));
extern int some_operand PROTO ((rtx, enum machine_mode));
+ extern int some_ni_operand PROTO ((rtx, enum machine_mode));
extern int input_operand PROTO ((rtx, enum machine_mode));
extern int current_file_function_operand PROTO ((rtx, enum machine_mode));
extern int call_operand PROTO ((rtx, enum machine_mode));
Index: alpha.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/alpha/alpha.c,v
retrieving revision 1.97
diff -c -p -d -r1.97 alpha.c
*** alpha.c 1999/09/23 12:36:05 1.97
--- alpha.c 1999/10/14 04:17:53
*************** some_operand (op, mode)
*** 585,590 ****
--- 585,606 ----
return 0;
}
+ /* Likewise, but don't accept constants. */
+
+ int
+ some_ni_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+ {
+ if (GET_MODE (op) != mode && mode != VOIDmode)
+ return 0;
+
+ if (GET_CODE (op) == SUBREG)
+ op = SUBREG_REG (op);
+
+ return (GET_CODE (op) == REG || GET_CODE (op) == MEM);
+ }
+
/* Return 1 if OP is a valid operand for the source of a move insn. */
int
Index: alpha.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/alpha/alpha.h,v
retrieving revision 1.78
diff -c -p -d -r1.78 alpha.h
*** alpha.h 1999/10/08 17:10:19 1.78
--- alpha.h 1999/10/14 04:17:53
*************** do { \
*** 2330,2335 ****
--- 2330,2336 ----
SYMBOL_REF, CONST, LABEL_REF}}, \
{"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
SYMBOL_REF, CONST, LABEL_REF}}, \
+ {"some_ni_operand", {SUBREG, REG, MEM}}, \
{"aligned_memory_operand", {MEM}}, \
{"unaligned_memory_operand", {MEM}}, \
{"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \
Index: alpha.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/alpha/alpha.md,v
retrieving revision 1.94
diff -c -p -d -r1.94 alpha.md
*** alpha.md 1999/10/09 20:18:48 1.94
--- alpha.md 1999/10/14 04:17:53
***************
*** 669,675 ****
;; recognize them while reloading.
(define_insn ""
! [(set (match_operand:DI 0 "some_operand" "=r,&r")
(plus:DI (plus:DI (match_operand:DI 1 "some_operand" "%r,r")
(match_operand:DI 2 "some_operand" "%r,r"))
(match_operand:DI 3 "some_operand" "IOKL,r")))]
--- 669,675 ----
;; recognize them while reloading.
(define_insn ""
! [(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
(plus:DI (plus:DI (match_operand:DI 1 "some_operand" "%r,r")
(match_operand:DI 2 "some_operand" "%r,r"))
(match_operand:DI 3 "some_operand" "IOKL,r")))]
***************
*** 687,693 ****
"")
(define_insn ""
! [(set (match_operand:SI 0 "some_operand" "=r,&r")
(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "some_operand" "rJ,rJ")
(match_operand:SI 2 "const48_operand" "I,I"))
(match_operand:SI 3 "some_operand" "%r,r"))
--- 687,693 ----
"")
(define_insn ""
! [(set (match_operand:SI 0 "some_ni_operand" "=r,&r")
(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "some_operand" "rJ,rJ")
(match_operand:SI 2 "const48_operand" "I,I"))
(match_operand:SI 3 "some_operand" "%r,r"))
***************
*** 708,714 ****
"")
(define_insn ""
! [(set (match_operand:DI 0 "some_operand" "=r,&r")
(sign_extend:DI
(plus:SI (plus:SI
(mult:SI (match_operand:SI 1 "some_operand" "rJ,rJ")
--- 708,714 ----
"")
(define_insn ""
! [(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
(sign_extend:DI
(plus:SI (plus:SI
(mult:SI (match_operand:SI 1 "some_operand" "rJ,rJ")
***************
*** 733,739 ****
"operands[5] = gen_lowpart (SImode, operands[0]);")
(define_insn ""
! [(set (match_operand:DI 0 "some_operand" "=r,&r")
(plus:DI (plus:DI (mult:DI (match_operand:DI 1 "some_operand" "rJ,rJ")
(match_operand:DI 2 "const48_operand" "I,I"))
(match_operand:DI 3 "some_operand" "%r,r"))
--- 733,739 ----
"operands[5] = gen_lowpart (SImode, operands[0]);")
(define_insn ""
! [(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
(plus:DI (plus:DI (mult:DI (match_operand:DI 1 "some_operand" "rJ,rJ")
(match_operand:DI 2 "const48_operand" "I,I"))
(match_operand:DI 3 "some_operand" "%r,r"))