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More PA64 cleanup work
- To: gcc-patches@gcc.gnu.org
- Subject: More PA64 cleanup work
- From: Jeffrey A Law <law@cygnus.com>
- Date: Wed, 28 Jul 1999 13:21:59 -0600
- Reply-To: law@cygnus.com
I found a few more places that were explicitly using SImode when they should
have been using word_mode.
We also need to make sure that we get a DImode register for the DImode
reload patterns. Otherwise bad things happen when we try to use the
scratch register later.
* pa.md (reload_indi, reload_outdi): Scratch register should
be a DImode register.
(call, call_value): Use "word_mode" instead of "SImode" as needed.
***************
*** 2465,2471 ****
(define_expand "reload_indi"
[(set (match_operand:DI 0 "register_operand" "=f")
(match_operand:DI 1 "non_hard_reg_operand" ""))
! (clobber (match_operand:SI 2 "register_operand" "=&r"))]
""
"
{
--- 2482,2488 ----
(define_expand "reload_indi"
[(set (match_operand:DI 0 "register_operand" "=f")
(match_operand:DI 1 "non_hard_reg_operand" ""))
! (clobber (match_operand:DI 2 "register_operand" "=&r"))]
""
"
{
***************
*** 2480,2486 ****
(define_expand "reload_outdi"
[(set (match_operand:DI 0 "general_operand" "")
(match_operand:DI 1 "register_operand" "f"))
! (clobber (match_operand:SI 2 "register_operand" "=&r"))]
""
"
{
--- 2497,2503 ----
(define_expand "reload_outdi"
[(set (match_operand:DI 0 "general_operand" "")
(match_operand:DI 1 "register_operand" "f"))
! (clobber (match_operand:DI 2 "register_operand" "=&r"))]
""
"
{
***************
*** 2530,2537 ****
[(set_attr "type" "move")
(set_attr "length" "8")])
- ;;; Experimental
-
(define_insn ""
[(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand"
"=r,o,Q,r,r,r,f,f,*TR")
--- 2547,2552 ----
***************
*** 4903,4910 ****
call_insn = emit_call_insn (gen_call_internal_symref (op, operands[1]));
else
{
! rtx tmpreg = gen_rtx_REG (SImode, 22);
! emit_move_insn (tmpreg, force_reg (SImode, op));
call_insn = emit_call_insn (gen_call_internal_reg (operands[1]));
}
--- 4970,4977 ----
call_insn = emit_call_insn (gen_call_internal_symref (op, operands[1]));
else
{
! rtx tmpreg = gen_rtx_REG (word_mode, 22);
! emit_move_insn (tmpreg, force_reg (word_mode, op));
call_insn = emit_call_insn (gen_call_internal_reg (operands[1]));
}
***************
*** 4918,4924 ****
This will set regs_ever_live for the callee saved register we
stored the PIC register in. */
emit_move_insn (pic_offset_table_rtx,
! gen_rtx_REG (SImode, PIC_OFFSET_TABLE_REGNUM_SAVED));
emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx));
/* Gross. We have to keep the scheduler from moving the restore
--- 4985,4991 ----
This will set regs_ever_live for the callee saved register we
stored the PIC register in. */
emit_move_insn (pic_offset_table_rtx,
! gen_rtx_REG (word_mode, PIC_OFFSET_TABLE_REGNUM_SAVED));
emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx));
/* Gross. We have to keep the scheduler from moving the restore
***************
*** 5047,5053 ****
rtx call_insn;
if (TARGET_PORTABLE_RUNTIME)
! op = force_reg (SImode, XEXP (operands[1], 0));
else
op = XEXP (operands[1], 0);
--- 5121,5127 ----
rtx call_insn;
if (TARGET_PORTABLE_RUNTIME)
! op = force_reg (word_mode, XEXP (operands[1], 0));
else
op = XEXP (operands[1], 0);
***************
*** 5062,5069 ****
operands[2]));
else
{
! rtx tmpreg = gen_rtx_REG (SImode, 22);
! emit_move_insn (tmpreg, force_reg (SImode, op));
call_insn = emit_call_insn (gen_call_value_internal_reg (operands[0],
operands[2]));
}
--- 5136,5143 ----
operands[2]));
else
{
! rtx tmpreg = gen_rtx_REG (word_mode, 22);
! emit_move_insn (tmpreg, force_reg (word_mode, op));
call_insn = emit_call_insn (gen_call_value_internal_reg (operands[0],
operands[2]));
}
***************
*** 5077,5083 ****
This will set regs_ever_live for the callee saved register we
stored the PIC register in. */
emit_move_insn (pic_offset_table_rtx,
! gen_rtx_REG (SImode, PIC_OFFSET_TABLE_REGNUM_SAVED));
emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx));
/* Gross. We have to keep the scheduler from moving the restore
--- 5151,5157 ----
This will set regs_ever_live for the callee saved register we
stored the PIC register in. */
emit_move_insn (pic_offset_table_rtx,
! gen_rtx_REG (word_mode, PIC_OFFSET_TABLE_REGNUM_SAVED));
emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx));
/* Gross. We have to keep the scheduler from moving the restore
***************
*** 5252,5258 ****
This will set regs_ever_live for the callee saved register we
stored the PIC register in. */
emit_move_insn (pic_offset_table_rtx,
! gen_rtx_REG (SImode, PIC_OFFSET_TABLE_REGNUM_SAVED));
emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx));
/* Gross. We have to keep the scheduler from moving the restore
--- 5333,5339 ----
This will set regs_ever_live for the callee saved register we
stored the PIC register in. */
emit_move_insn (pic_offset_table_rtx,
! gen_rtx_REG (word_mode, PIC_OFFSET_TABLE_REGNUM_SAVED));
emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx));
/* Gross. We have to keep the scheduler from moving the restore
***************
*** 5322,5328 ****
This will set regs_ever_live for the callee saved register we
stored the PIC register in. */
emit_move_insn (pic_offset_table_rtx,
! gen_rtx_REG (SImode, PIC_OFFSET_TABLE_REGNUM_SAVED));
emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx));
/* Gross. We have to keep the scheduler from moving the restore
--- 5403,5409 ----
This will set regs_ever_live for the callee saved register we
stored the PIC register in. */
emit_move_insn (pic_offset_table_rtx,
! gen_rtx_REG (word_mode, PIC_OFFSET_TABLE_REGNUM_SAVED));
emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx));
/* Gross. We have to keep the scheduler from moving the restore