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Defining sparclite86x as sparclite not as v8
- To: egcs-patches@egcs.cygnus.com
- Subject: Defining sparclite86x as sparclite not as v8
- From: Vladimir Makarov <vmakarov@toad.to.cygnus.com>
- Date: Tue, 27 Jul 1999 15:43:45 -0400
By default sparclite86x was defined as V8. This results in that Sparc
insn sdiv/udiv is generated to implement integer division. Some
processors sparclite 86x family has no such insn. Information about
other family processors are absent. To generate correct code for all
sparclite86x family it is better to define sparclite86x as sparclite.
The following patch makes it. The patch has been applied to egcs
repository.
Tue Jul 27 15:31:53 1999 Vladimir Makarov <vmakarov@toad.to.cygnus.com>
* config/sparc/sparc.c (sparc_override_options): Enable SPARCLITE
instead of V8 for sparclite86x in cpu_table.
Index: config/sparc/sparc.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/sparc/sparc.c,v
retrieving revision 1.72
diff -c -p -r1.72 sparc.c
*** sparc.c 1999/07/26 01:21:58 1.72
--- sparc.c 1999/07/27 19:38:48
*************** sparc_override_options ()
*** 207,213 ****
{ "f930", PROCESSOR_F930, MASK_ISA|MASK_FPU, MASK_SPARCLITE },
{ "f934", PROCESSOR_F934, MASK_ISA, MASK_SPARCLITE|MASK_FPU },
{ "hypersparc", PROCESSOR_HYPERSPARC, MASK_ISA, MASK_V8|MASK_FPU },
! { "sparclite86x", PROCESSOR_SPARCLITE86X, MASK_ISA|MASK_FPU, MASK_V8 },
{ "sparclet", PROCESSOR_SPARCLET, MASK_ISA, MASK_SPARCLET },
/* TEMIC sparclet */
{ "tsc701", PROCESSOR_TSC701, MASK_ISA, MASK_SPARCLET },
--- 207,214 ----
{ "f930", PROCESSOR_F930, MASK_ISA|MASK_FPU, MASK_SPARCLITE },
{ "f934", PROCESSOR_F934, MASK_ISA, MASK_SPARCLITE|MASK_FPU },
{ "hypersparc", PROCESSOR_HYPERSPARC, MASK_ISA, MASK_V8|MASK_FPU },
! { "sparclite86x", PROCESSOR_SPARCLITE86X, MASK_ISA|MASK_FPU,
! MASK_SPARCLITE },
{ "sparclet", PROCESSOR_SPARCLET, MASK_ISA, MASK_SPARCLET },
/* TEMIC sparclet */
{ "tsc701", PROCESSOR_TSC701, MASK_ISA, MASK_SPARCLET },