This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
patch to learn addhi/addqi patterns about lea instruction.
- To: egcs-patches at egcs dot cygnus dot com
- Subject: patch to learn addhi/addqi patterns about lea instruction.
- From: Jan Hubicka <hubicka at atrey dot karlin dot mff dot cuni dot cz>
- Date: Tue, 13 Apr 1999 15:55:49 +0200
Hi,
This is patch to learn addhi and addqi patterns about lea instruction.
Note that I am not sure, if this change help to PPro in the QImode case
because of partial register stalls...
Honza
Mon Apr 12 20:46:17 CEST 1999 Jan Hubicka <hubicka@freesoft.cz>
* i386.md (QImode add pattern): Support lea instruction.
(HImode add pattern): Likewise.
*** i386.md.old2 Mon Apr 12 19:39:20 1999
--- i386.md Mon Apr 12 20:57:53 1999
***************
*** 3182,3193 ****
"IX86_EXPAND_BINARY_OPERATOR (PLUS, HImode, operands);")
(define_insn ""
! [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
! (plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
! (match_operand:HI 2 "general_operand" "ri,rm")))]
"ix86_binary_operator_ok (PLUS, HImode, operands)"
"*
{
/* ??? what about offsettable memory references? */
if (!TARGET_PENTIUMPRO /* partial stalls are just too painful to risk. */
&& QI_REG_P (operands[0])
--- 3184,3210 ----
"IX86_EXPAND_BINARY_OPERATOR (PLUS, HImode, operands);")
(define_insn ""
! [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,?r,r")
! (plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,r,0")
! (match_operand:HI 2 "general_operand" "ri,ri,rm")))]
"ix86_binary_operator_ok (PLUS, HImode, operands)"
"*
{
+ if (REG_P (operands[0]) && REG_P (operands[1])
+ && (REG_P (operands[2]) || CONSTANT_P (operands[2]))
+ && REGNO (operands[0]) != REGNO (operands[1]))
+ {
+ if (operands[2] == stack_pointer_rtx)
+ abort ();
+
+ CC_STATUS_INIT;
+ operands[1] = gen_rtx_PLUS(SImode, gen_rtx_REG (SImode, REGNO (operands[1])),
+ !REG_P (operands[2]) ? operands[2]
+ :gen_rtx_REG (SImode, REGNO (operands[2])));
+ operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));
+ return AS2 (lea%L0,%a1,%0);
+ }
+
/* ??? what about offsettable memory references? */
if (!TARGET_PENTIUMPRO /* partial stalls are just too painful to risk. */
&& QI_REG_P (operands[0])
***************
*** 3249,3260 ****
"IX86_EXPAND_BINARY_OPERATOR (PLUS, QImode, operands);")
(define_insn ""
! [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q")
! (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
! (match_operand:QI 2 "general_operand" "qn,qmn")))]
! "ix86_binary_operator_ok (PLUS, QImode, operands)"
"*
{
if (operands[2] == const1_rtx)
return AS1 (inc%B0,%0);
--- 3266,3293 ----
"IX86_EXPAND_BINARY_OPERATOR (PLUS, QImode, operands);")
(define_insn ""
! [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,?q,q")
! (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,q,0")
! (match_operand:QI 2 "general_operand" "qn,qn,qmn")))]
! "which_alternative == 1 || ix86_binary_operator_ok (PLUS, QImode, operands)"
"*
{
+ if (REG_P (operands[0]) && REG_P (operands[1])
+ && (REG_P (operands[2]) || CONSTANT_P (operands[2]))
+ && (REGNO (operands[0]) != REGNO (operands[1])
+ || NON_QI_REG_P (operands[1])
+ || (REG_P (operands[2]) && NON_QI_REG_P (operands[2]))))
+ {
+ if (operands[2] == stack_pointer_rtx)
+ abort ();
+
+ CC_STATUS_INIT;
+ operands[1] = gen_rtx_PLUS(SImode, gen_rtx_REG (SImode, REGNO (operands[1])),
+ !REG_P (operands[2]) ? operands[2]
+ :gen_rtx_REG (SImode, REGNO (operands[2])));
+ operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));
+ return AS2 (lea%L0,%a1,%0);
+ }
if (operands[2] == const1_rtx)
return AS1 (inc%B0,%0);