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Re: patch to reduce register pressure from strength reduction
- To: zack at rabi dot columbia dot edu (Zack Weinberg)
- Subject: Re: patch to reduce register pressure from strength reduction
- From: Joern Rennecke <amylaar at cygnus dot co dot uk>
- Date: Sat, 30 Jan 1999 02:46:53 +0000 (GMT)
- Cc: amylaar at cygnus dot co dot uk, egcs-patches at cygnus dot com, wilson at cygnus dot com, law at cygnus dot com
> >Could you send me your ld-time.i ?
>
> Attached. I pruned it as much as I was able, but this is disgusting
> code and I don't want to risk perturbing the bug out of existence.
Thanks. I've got a patch now:
Sat Jan 30 02:42:41 1999 J"orn Rennecke <amylaar@cygnus.co.uk>
* loop.c (strength_reduce): Size reg_map according to reg_iv_type.
*** loop.c-1999013001 Sat Jan 30 02:33:08 1999
--- loop.c Sat Jan 30 02:41:18 1999
*************** strength_reduce (scan_start, end, loop_t
*** 3665,3670 ****
--- 3665,3671 ----
int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
/* Map of pseudo-register replacements. */
rtx *reg_map;
+ int reg_map_size;
int call_seen;
rtx test;
rtx end_insert_before;
*************** strength_reduce (scan_start, end, loop_t
*** 4418,4426 ****
so that "decrement and branch until zero" insn can be used. */
check_dbra_loop (loop_end, insn_count, loop_start, loop_info);
! /* Create reg_map to hold substitutions for replaceable giv regs. */
! reg_map = (rtx *) alloca (max_reg_before_loop * sizeof (rtx));
! bzero ((char *) reg_map, max_reg_before_loop * sizeof (rtx));
/* Examine each iv class for feasibility of strength reduction/induction
variable elimination. */
--- 4419,4430 ----
so that "decrement and branch until zero" insn can be used. */
check_dbra_loop (loop_end, insn_count, loop_start, loop_info);
! /* Create reg_map to hold substitutions for replaceable giv regs.
! Some givs might have been made from biv increments, so look at
! reg_iv_type for a suitable size. */
! reg_map_size = reg_iv_type->num_elements;
! reg_map = (rtx *) alloca (reg_map_size * sizeof (rtx));
! bzero ((char *) reg_map, reg_map_size * sizeof (rtx));
/* Examine each iv class for feasibility of strength reduction/induction
variable elimination. */
*************** strength_reduce (scan_start, end, loop_t
*** 4961,4968 ****
if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
|| GET_CODE (p) == CALL_INSN)
{
! replace_regs (PATTERN (p), reg_map, max_reg_before_loop, 0);
! replace_regs (REG_NOTES (p), reg_map, max_reg_before_loop, 0);
INSN_CODE (p) = -1;
}
--- 4965,4972 ----
if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
|| GET_CODE (p) == CALL_INSN)
{
! replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
! replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
INSN_CODE (p) = -1;
}