cse.c (simplify_unary_operation): Sign-extend constants when...

[Jim Wilson <wilson at cygnus dot com>]

I have checked in this patch to fix alpha-x-m32r-elf build failures.  An
alpha hosted m32r-elf cross compiler now works almost as well as a linux
hosted one.  The cse.c and real.c changes are just copying code that already
exists in simplify_binary_operation.  The m32r changes fix code that wasn't
64 bit safe.

Thu Dec 10 16:02:06 1998  Jim Wilson  <wilson@cygnus.com>

	* cse.c (simplify_unary_operation): Sign-extend constants when
	they have the most significant bit set for the target.
	* real.c (endian): Sign-extend 32 bit output values on a 64 bit
	host.
	* m32r/m32r.c (m32r_expand_prologue): Store pretend_size in
	HOST_WIDE_INT temporary before negating it.
	* m32r/m32r.md (movsi_insn+1): Use ~0xffff instead of 0xffff0000.

Index: gcc/cse.c
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/cse.c,v
retrieving revision 1.161
diff -p -r1.161 cse.c
*** cse.c	1998/11/25 07:34:47	1.161
--- cse.c	1998/12/10 23:44:45
*************** simplify_unary_operation (code, mode, op
*** 3242,3247 ****
--- 3242,3260 ----
  	      != ((HOST_WIDE_INT) (-1) << (width - 1))))
  	val &= ((HOST_WIDE_INT) 1 << width) - 1;
  
+       /* If this would be an entire word for the target, but is not for
+ 	 the host, then sign-extend on the host so that the number will look
+ 	 the same way on the host that it would on the target.
+ 
+ 	 For example, when building a 64 bit alpha hosted 32 bit sparc
+ 	 targeted compiler, then we want the 32 bit unsigned value -1 to be
+ 	 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
+ 	 The later confuses the sparc backend.  */
+ 
+       if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
+ 	  && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
+ 	val |= ((HOST_WIDE_INT) (-1) << width);
+ 
        return GEN_INT (val);
      }
  
Index: gcc/real.c
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/real.c,v
retrieving revision 1.37
diff -p -r1.37 real.c
*** real.c	1998/11/23 08:14:19	1.37
--- real.c	1998/12/10 23:44:45
*************** endian (e, x, mode)
*** 553,558 ****
--- 553,572 ----
  	  abort ();
  	}
      }
+ 
+   /* If 32 bits is an entire word for the target, but not for the host,
+      then sign-extend on the host so that the number will look the same
+      way on the host that it would on the target.  See for instance
+      simplify_unary_operation.  */
+ 
+   if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == 32)
+     {
+       if (x[0] & ((HOST_WIDE_INT) 1 << 31))
+ 	x[0] |= ((HOST_WIDE_INT) (-1) << 32);
+ 
+       if (x[1] & ((HOST_WIDE_INT) 1 << 31))
+ 	x[1] |= ((HOST_WIDE_INT) (-1) << 32);
+     }
  }
  
  
Index: gcc/config/m32r/m32r.c
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/config/m32r/m32r.c,v
retrieving revision 1.54
diff -p -r1.54 m32r.c
*** m32r.c	1998/11/11 05:52:22	1.54
--- m32r.c	1998/12/10 23:44:48
*************** m32r_expand_prologue ()
*** 1939,1947 ****
  
    /* Allocate space for register arguments if this is a variadic function.  */
    if (current_frame_info.pretend_size != 0)
!     emit_insn (gen_addsi3 (stack_pointer_rtx,
! 			   stack_pointer_rtx,
! 			   GEN_INT (-current_frame_info.pretend_size)));
  
    /* Save any registers we need to and set up fp.  */
  
--- 1939,1952 ----
  
    /* Allocate space for register arguments if this is a variadic function.  */
    if (current_frame_info.pretend_size != 0)
!     {
!       /* Use a HOST_WIDE_INT temporary, since negating an unsigned int gives
! 	 the wrong result on a 64-bit host.  */
!       HOST_WIDE_INT pretend_size = current_frame_info.pretend_size;
!       emit_insn (gen_addsi3 (stack_pointer_rtx,
! 			     stack_pointer_rtx,
! 			     GEN_INT (-pretend_size)));
!     }
  
    /* Save any registers we need to and set up fp.  */
  
Index: gcc/config/m32r/m32r.md
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/config/m32r/m32r.md,v
retrieving revision 1.57
diff -p -r1.57 m32r.md
*** m32r.md	1998/11/24 17:33:43	1.57
--- m32r.md	1998/12/10 23:59:46
***************
*** 534,541 ****
  	}
      }
  
!   /* Can't use any two byte insn, fall back to seth/or3.  */
!   operands[2] = GEN_INT ((val) & 0xffff0000);
    operands[3] = GEN_INT ((val) & 0xffff);
  }")
  
--- 534,542 ----
  	}
      }
  
!   /* Can't use any two byte insn, fall back to seth/or3.  Use ~0xffff instead
!      of 0xffff0000, since the later fails on a 64-bit host.  */
!   operands[2] = GEN_INT ((val) & ~0xffff);
    operands[3] = GEN_INT ((val) & 0xffff);
  }")