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autoinc change checkin
- To: egcs-patches at cygnus dot com
- Subject: autoinc change checkin
- From: Jeffrey A Law <law at cygnus dot com>
- Date: Wed, 25 Nov 1998 00:12:47 -0700
- Reply-To: law at cygnus dot com
This change allows targets to have the autoincrement addressing mode support
be dependent on target flags (like those which select subtargets).
No machines in egcs currently require this; however, I believe this change will
be useful for pa2.0 optimizations (autoincs are discouraged for pa2.0).
* cse.c (fold_rtx): Make autoincrement addressing mode tests be
runtime selectable.
* expr.c (move_by_pieces): Similarly.
(move_by_pieces_1, clear_by_pieces, clear_by_pieces_1): Similarly.
* flow.c (find_auto_inc): Similarly.
(try_pre_increment): Similarly.
* loop.c (strength_reduce): Similarly.
* regclass.c (auto_inc_dec_reg_p): Similarly.
* regmove.c (try_auto_increment): Similarly.
(fixup_match_1): Similarly.
* rtl.h (HAVE_PRE_INCREMENT): Define if not already defined.
(HAVE_PRE_DECREMENT): Similarly.
(HAVE_POST_INCREMENT, HAVE_POST_DECREMENT): Similarly.
* Corresponding changes to all target header files.
* tm.texi Update docs for autoincrement addressing.
Index: cse.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/cse.c,v
retrieving revision 1.51
diff -c -3 -p -r1.51 cse.c
*** cse.c 1998/10/17 20:26:11 1.51
--- cse.c 1998/11/25 06:40:49
*************** fold_rtx (x, insn)
*** 5760,5773 ****
identical powers of two with post decrement. */
if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
! && (0
! #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
! || exact_log2 (INTVAL (const_arg1)) >= 0
! #endif
! #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
! || exact_log2 (- INTVAL (const_arg1)) >= 0
! #endif
! ))
break;
/* Compute the code used to compose the constants. For example,
--- 5760,5773 ----
identical powers of two with post decrement. */
if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
! && ((HAVE_PRE_INCREMENT
! && exact_log2 (INTVAL (const_arg1)) >= 0)
! || (HAVE_POST_INCREMENT
! && exact_log2 (INTVAL (const_arg1)) >= 0)
! || (HAVE_PRE_DECREMENT
! && exact_log2 (- INTVAL (const_arg1)) >= 0)
! || (HAVE_POST_DECREMENT
! && exact_log2 (- INTVAL (const_arg1)) >= 0)))
break;
/* Compute the code used to compose the constants. For example,
Index: expr.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/expr.c,v
retrieving revision 1.109
diff -c -3 -p -r1.109 expr.c
*** expr.c 1998/11/19 22:47:50 1.109
--- expr.c 1998/11/25 06:41:05
*************** move_by_pieces (to, from, len, align)
*** 1442,1481 ****
if (!(data.autinc_from && data.autinc_to)
&& move_by_pieces_ninsns (len, align) > 2)
{
! #ifdef HAVE_PRE_DECREMENT
! if (data.reverse && ! data.autinc_from)
{
data.from_addr = copy_addr_to_reg (plus_constant (from_addr, len));
data.autinc_from = 1;
data.explicit_inc_from = -1;
}
! #endif
! #ifdef HAVE_POST_INCREMENT
! if (! data.autinc_from)
{
data.from_addr = copy_addr_to_reg (from_addr);
data.autinc_from = 1;
data.explicit_inc_from = 1;
}
- #endif
if (!data.autinc_from && CONSTANT_P (from_addr))
data.from_addr = copy_addr_to_reg (from_addr);
! #ifdef HAVE_PRE_DECREMENT
! if (data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
data.autinc_to = 1;
data.explicit_inc_to = -1;
}
! #endif
! #ifdef HAVE_POST_INCREMENT
! if (! data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (to_addr);
data.autinc_to = 1;
data.explicit_inc_to = 1;
}
- #endif
if (!data.autinc_to && CONSTANT_P (to_addr))
data.to_addr = copy_addr_to_reg (to_addr);
}
--- 1442,1473 ----
if (!(data.autinc_from && data.autinc_to)
&& move_by_pieces_ninsns (len, align) > 2)
{
! if (HAVE_PRE_DECREMENT && data.reverse && ! data.autinc_from)
{
data.from_addr = copy_addr_to_reg (plus_constant (from_addr, len));
data.autinc_from = 1;
data.explicit_inc_from = -1;
}
! if (HAVE_POST_INCREMENT && ! data.autinc_from)
{
data.from_addr = copy_addr_to_reg (from_addr);
data.autinc_from = 1;
data.explicit_inc_from = 1;
}
if (!data.autinc_from && CONSTANT_P (from_addr))
data.from_addr = copy_addr_to_reg (from_addr);
! if (HAVE_PRE_DECREMENT && data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
data.autinc_to = 1;
data.explicit_inc_to = -1;
}
! if (HAVE_POST_INCREMENT && ! data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (to_addr);
data.autinc_to = 1;
data.explicit_inc_to = 1;
}
if (!data.autinc_to && CONSTANT_P (to_addr))
data.to_addr = copy_addr_to_reg (to_addr);
}
*************** move_by_pieces_1 (genfun, mode, data)
*** 1586,1605 ****
data->offset))));
MEM_IN_STRUCT_P (from1) = data->from_struct;
! #ifdef HAVE_PRE_DECREMENT
! if (data->explicit_inc_to < 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (-size)));
! if (data->explicit_inc_from < 0)
emit_insn (gen_add2_insn (data->from_addr, GEN_INT (-size)));
- #endif
emit_insn ((*genfun) (to1, from1));
! #ifdef HAVE_POST_INCREMENT
! if (data->explicit_inc_to > 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
! if (data->explicit_inc_from > 0)
emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
- #endif
if (! data->reverse) data->offset += size;
--- 1578,1593 ----
data->offset))));
MEM_IN_STRUCT_P (from1) = data->from_struct;
! if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (-size)));
! if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
emit_insn (gen_add2_insn (data->from_addr, GEN_INT (-size)));
emit_insn ((*genfun) (to1, from1));
! if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
! if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
if (! data->reverse) data->offset += size;
*************** clear_by_pieces (to, len, align)
*** 2267,2288 ****
if (!data.autinc_to
&& move_by_pieces_ninsns (len, align) > 2)
{
! #ifdef HAVE_PRE_DECREMENT
! if (data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
data.autinc_to = 1;
data.explicit_inc_to = -1;
}
! #endif
! #ifdef HAVE_POST_INCREMENT
! if (! data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (to_addr);
data.autinc_to = 1;
data.explicit_inc_to = 1;
}
- #endif
if (!data.autinc_to && CONSTANT_P (to_addr))
data.to_addr = copy_addr_to_reg (to_addr);
}
--- 2255,2272 ----
if (!data.autinc_to
&& move_by_pieces_ninsns (len, align) > 2)
{
! if (HAVE_PRE_DECREMENT && data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
data.autinc_to = 1;
data.explicit_inc_to = -1;
}
! if (HAVE_POST_INCREMENT && ! data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (to_addr);
data.autinc_to = 1;
data.explicit_inc_to = 1;
}
if (!data.autinc_to && CONSTANT_P (to_addr))
data.to_addr = copy_addr_to_reg (to_addr);
}
*************** clear_by_pieces_1 (genfun, mode, data)
*** 2345,2360 ****
data->offset))));
MEM_IN_STRUCT_P (to1) = data->to_struct;
! #ifdef HAVE_PRE_DECREMENT
! if (data->explicit_inc_to < 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (-size)));
- #endif
emit_insn ((*genfun) (to1, const0_rtx));
! #ifdef HAVE_POST_INCREMENT
! if (data->explicit_inc_to > 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
- #endif
if (! data->reverse) data->offset += size;
--- 2329,2340 ----
data->offset))));
MEM_IN_STRUCT_P (to1) = data->to_struct;
! if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (-size)));
emit_insn ((*genfun) (to1, const0_rtx));
! if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
if (! data->reverse) data->offset += size;
Index: flow.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/flow.c,v
retrieving revision 1.84
diff -c -3 -p -r1.84 flow.c
*** flow.c 1998/11/17 09:14:33 1.84
--- flow.c 1998/11/25 06:41:10
*************** find_auto_inc (needed, x, insn)
*** 2444,2463 ****
&& (y = SET_SRC (set), GET_CODE (y) == PLUS)
&& XEXP (y, 0) == addr
&& GET_CODE (XEXP (y, 1)) == CONST_INT
! && (0
! #ifdef HAVE_POST_INCREMENT
! || (INTVAL (XEXP (y, 1)) == size && offset == 0)
! #endif
! #ifdef HAVE_POST_DECREMENT
! || (INTVAL (XEXP (y, 1)) == - size && offset == 0)
! #endif
! #ifdef HAVE_PRE_INCREMENT
! || (INTVAL (XEXP (y, 1)) == size && offset == size)
! #endif
! #ifdef HAVE_PRE_DECREMENT
! || (INTVAL (XEXP (y, 1)) == - size && offset == - size)
! #endif
! )
/* Make sure this reg appears only once in this insn. */
&& (use = find_use_as_address (PATTERN (insn), addr, offset),
use != 0 && use != (rtx) 1))
--- 2444,2457 ----
&& (y = SET_SRC (set), GET_CODE (y) == PLUS)
&& XEXP (y, 0) == addr
&& GET_CODE (XEXP (y, 1)) == CONST_INT
! && ((HAVE_POST_INCREMENT
! && (INTVAL (XEXP (y, 1)) == size && offset == 0))
! || (HAVE_POST_DECREMENT
! && (INTVAL (XEXP (y, 1)) == - size && offset == 0))
! || (HAVE_PRE_INCREMENT
! && (INTVAL (XEXP (y, 1)) == size && offset == size))
! || (HAVE_PRE_DECREMENT
! && (INTVAL (XEXP (y, 1)) == - size && offset == - size)))
/* Make sure this reg appears only once in this insn. */
&& (use = find_use_as_address (PATTERN (insn), addr, offset),
use != 0 && use != (rtx) 1))
*************** try_pre_increment (insn, reg, amount)
*** 3021,3043 ****
/* From the sign of increment, see which possibilities are conceivable
on this target machine. */
! #ifdef HAVE_PRE_INCREMENT
! if (amount > 0)
pre_ok = 1;
! #endif
! #ifdef HAVE_POST_INCREMENT
! if (amount > 0)
post_ok = 1;
- #endif
! #ifdef HAVE_PRE_DECREMENT
! if (amount < 0)
pre_ok = 1;
! #endif
! #ifdef HAVE_POST_DECREMENT
! if (amount < 0)
post_ok = 1;
- #endif
if (! (pre_ok || post_ok))
return 0;
--- 3015,3029 ----
/* From the sign of increment, see which possibilities are conceivable
on this target machine. */
! if (HAVE_PRE_INCREMENT && amount > 0)
pre_ok = 1;
! if (HAVE_POST_INCREMENT && amount > 0)
post_ok = 1;
! if (HAVE_PRE_DECREMENT && amount < 0)
pre_ok = 1;
! if (HAVE_POST_DECREMENT && amount < 0)
post_ok = 1;
if (! (pre_ok || post_ok))
return 0;
Index: loop.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/loop.c,v
retrieving revision 1.97
diff -c -3 -p -r1.97 loop.c
*** loop.c 1998/11/21 21:14:46 1.97
--- loop.c 1998/11/25 06:41:21
*************** strength_reduce (scan_start, end, loop_t
*** 4168,4181 ****
if (v->giv_type == DEST_ADDR
&& GET_CODE (v->mult_val) == CONST_INT)
{
! #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
! if (INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
benefit += add_cost * bl->biv_count;
! #endif
! #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
! if (-INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
benefit += add_cost * bl->biv_count;
! #endif
}
#endif
--- 4168,4185 ----
if (v->giv_type == DEST_ADDR
&& GET_CODE (v->mult_val) == CONST_INT)
{
! if (HAVE_POST_INCREMENT
! && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
benefit += add_cost * bl->biv_count;
! else if (HAVE_PRE_INCREMENT
! && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
benefit += add_cost * bl->biv_count;
! else if (HAVE_POST_DECREMENT
! && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
! benefit += add_cost * bl->biv_count;
! else if (HAVE_PRE_DECREMENT
! && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
! benefit += add_cost * bl->biv_count;
}
#endif
Index: regclass.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/regclass.c,v
retrieving revision 1.42
diff -c -3 -p -r1.42 regclass.c
*** regclass.c 1998/11/19 19:58:23 1.42
--- regclass.c 1998/11/25 06:41:25
*************** auto_inc_dec_reg_p (reg, mode)
*** 1770,1794 ****
rtx reg;
enum machine_mode mode;
{
! #ifdef HAVE_POST_INCREMENT
! if (memory_address_p (mode, gen_rtx_POST_INC (Pmode, reg)))
return 1;
- #endif
! #ifdef HAVE_POST_DECREMENT
! if (memory_address_p (mode, gen_rtx_POST_DEC (Pmode, reg)))
return 1;
- #endif
! #ifdef HAVE_PRE_INCREMENT
! if (memory_address_p (mode, gen_rtx_PRE_INC (Pmode, reg)))
return 1;
- #endif
! #ifdef HAVE_PRE_DECREMENT
! if (memory_address_p (mode, gen_rtx_PRE_DEC (Pmode, reg)))
return 1;
- #endif
return 0;
}
--- 1770,1790 ----
rtx reg;
enum machine_mode mode;
{
! if (HAVE_POST_INCREMENT
! && memory_address_p (mode, gen_rtx_POST_INC (Pmode, reg)))
return 1;
! if (HAVE_POST_DECREMENT
! && memory_address_p (mode, gen_rtx_POST_DEC (Pmode, reg)))
return 1;
! if (HAVE_PRE_INCREMENT
! && memory_address_p (mode, gen_rtx_PRE_INC (Pmode, reg)))
return 1;
! if (HAVE_PRE_DECREMENT
! && memory_address_p (mode, gen_rtx_PRE_DEC (Pmode, reg)))
return 1;
return 0;
}
Index: regmove.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/regmove.c,v
retrieving revision 1.44
diff -c -3 -p -r1.44 regmove.c
*** regmove.c 1998/11/22 05:59:02 1.44
--- regmove.c 1998/11/25 06:41:26
*************** struct match {
*** 52,60 ****
int early_clobber[MAX_RECOG_OPERANDS];
};
- #ifdef AUTO_INC_DEC
static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
- #endif
static int find_matches PROTO((rtx, struct match *));
static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
;
--- 52,58 ----
*************** gen_add3_insn (r0, r1, c)
*** 93,99 ****
return (GEN_FCN (icode) (r0, r1, c));
}
- #ifdef AUTO_INC_DEC
/* INC_INSN is an instruction that adds INCREMENT to REG.
Try to fold INC_INSN as a post/pre in/decrement into INSN.
--- 91,96 ----
*************** try_auto_increment (insn, inc_insn, inc_
*** 117,134 ****
{
int size = GET_MODE_SIZE (GET_MODE (use));
if (0
! #ifdef HAVE_POST_INCREMENT
! || (pre == 0 && (inc_code = POST_INC, increment == size))
! #endif
! #ifdef HAVE_PRE_INCREMENT
! || (pre == 1 && (inc_code = PRE_INC, increment == size))
! #endif
! #ifdef HAVE_POST_DECREMENT
! || (pre == 0 && (inc_code = POST_DEC, increment == -size))
! #endif
! #ifdef HAVE_PRE_DECREMENT
! || (pre == 1 && (inc_code = PRE_DEC, increment == -size))
! #endif
)
{
if (inc_insn_set)
--- 114,127 ----
{
int size = GET_MODE_SIZE (GET_MODE (use));
if (0
! || (HAVE_POST_INCREMENT
! && pre == 0 && (inc_code = POST_INC, increment == size))
! || (HAVE_PRE_INCREMENT
! && pre == 1 && (inc_code = PRE_INC, increment == size))
! || (HAVE_POST_DECREMENT
! && pre == 0 && (inc_code = POST_DEC, increment == -size))
! || (HAVE_PRE_DECREMENT
! && pre == 1 && (inc_code = PRE_DEC, increment == -size))
)
{
if (inc_insn_set)
*************** try_auto_increment (insn, inc_insn, inc_
*** 156,162 ****
}
return 0;
}
- #endif /* AUTO_INC_DEC */
static int *regno_src_regno;
--- 149,154 ----
*************** fixup_match_1 (insn, set, src, src_subre
*** 1725,1735 ****
if (code == MINUS)
{
post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
! #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
! if (search_end
&& try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
post_inc = 0;
- #endif
validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
REG_N_SETS (REGNO (src))++;
REG_N_REFS (REGNO (src)) += true_loop_depth;
--- 1717,1726 ----
if (code == MINUS)
{
post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
! if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
! && search_end
&& try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
post_inc = 0;
validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
REG_N_SETS (REGNO (src))++;
REG_N_REFS (REGNO (src)) += true_loop_depth;
*************** fixup_match_1 (insn, set, src, src_subre
*** 1834,1864 ****
else in the next two conditionally included code blocks. */
if (0)
{;}
! #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
! else if ((code == PLUS || code == MINUS) && insn_const
&& try_auto_increment (p, insn, 0, src, insn_const, 1))
insn = p;
! #endif
! #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
! else if (post_inc
&& try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
post_inc = 0;
- #endif
- #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
/* If post_inc still prevails, try to find an
insn where it can be used as a pre-in/decrement.
If code is MINUS, this was already tried. */
if (post_inc && code == PLUS
/* Check that newconst is likely to be usable
in a pre-in/decrement before starting the search. */
! && (0
! #if defined (HAVE_PRE_INCREMENT)
! || (newconst > 0 && newconst <= MOVE_MAX)
! #endif
! #if defined (HAVE_PRE_DECREMENT)
! || (newconst < 0 && newconst >= -MOVE_MAX)
! #endif
! ) && exact_log2 (newconst))
{
rtx q, inc_dest;
--- 1825,1847 ----
else in the next two conditionally included code blocks. */
if (0)
{;}
! else if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
! && (code == PLUS || code == MINUS) && insn_const
&& try_auto_increment (p, insn, 0, src, insn_const, 1))
insn = p;
! else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
! && post_inc
&& try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
post_inc = 0;
/* If post_inc still prevails, try to find an
insn where it can be used as a pre-in/decrement.
If code is MINUS, this was already tried. */
if (post_inc && code == PLUS
/* Check that newconst is likely to be usable
in a pre-in/decrement before starting the search. */
! && ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX)
! || (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX))
! && exact_log2 (newconst))
{
rtx q, inc_dest;
*************** fixup_match_1 (insn, set, src, src_subre
*** 1895,1901 ****
}
}
}
- #endif /* defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) */
/* Move the death note for DST to INSN if it is used
there. */
if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
--- 1878,1883 ----
Index: rtl.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/rtl.h,v
retrieving revision 1.64
diff -c -3 -p -r1.64 rtl.h
*** rtl.h 1998/11/07 13:00:39 1.64
--- rtl.h 1998/11/25 06:41:30
*************** extern char *note_insn_name[];
*** 699,704 ****
--- 699,720 ----
#define AUTO_INC_DEC
#endif
+ #ifndef HAVE_PRE_INCREMENT
+ #define HAVE_PRE_INCREMENT 0
+ #endif
+
+ #ifndef HAVE_PRE_DECREMENT
+ #define HAVE_PRE_DECREMENT 0
+ #endif
+
+ #ifndef HAVE_POST_INCREMENT
+ #define HAVE_POST_INCREMENT 0
+ #endif
+
+ #ifndef HAVE_POST_DECREMENT
+ #define HAVE_POST_DECREMENT 0
+ #endif
+
/* Accessors for RANGE_INFO. */
/* For RANGE_{START,END} notes return the RANGE_START note. */
#define RANGE_INFO_NOTE_START(INSN) (XEXP (INSN, 0))
Index: tm.texi
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/tm.texi,v
retrieving revision 1.58
diff -c -3 -p -r1.58 tm.texi
*** tm.texi 1998/11/19 22:47:55 1.58
--- tm.texi 1998/11/25 06:41:42
*************** This is about addressing modes.
*** 4156,4162 ****
@table @code
@findex HAVE_POST_INCREMENT
@item HAVE_POST_INCREMENT
! Define this macro if the machine supports post-increment addressing.
@findex HAVE_PRE_INCREMENT
@findex HAVE_POST_DECREMENT
--- 4156,4162 ----
@table @code
@findex HAVE_POST_INCREMENT
@item HAVE_POST_INCREMENT
! A C expression that is nonzero the machine supports post-increment addressing.
@findex HAVE_PRE_INCREMENT
@findex HAVE_POST_DECREMENT
Index: config/1750a/1750a.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/1750a/1750a.h,v
retrieving revision 1.6
diff -c -3 -p -r1.6 1750a.h
*** 1750a.h 1998/09/08 22:47:57 1.6
--- 1750a.h 1998/11/25 06:41:45
*************** enum reg_class { NO_REGS, R2, R0_1, INDE
*** 707,716 ****
/* 1750 doesn't have a lot of auto-incr./decr. - just for the stack ptr. */
! /* #define HAVE_POST_INCREMENT just for R15 (stack pointer) */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT just for R15 (stack pointer) */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 707,716 ----
/* 1750 doesn't have a lot of auto-incr./decr. - just for the stack ptr. */
! /* #define HAVE_POST_INCREMENT 0 just for R15 (stack pointer) */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 just for R15 (stack pointer) */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/a29k/a29k.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/a29k/a29k.h,v
retrieving revision 1.5
diff -c -3 -p -r1.5 a29k.h
*** a29k.h 1998/05/05 23:17:35 1.5
--- a29k.h 1998/11/25 06:41:48
*************** extern char *a29k_function_name;
*** 1067,1077 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 1067,1077 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/alpha/alpha.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/alpha/alpha.h,v
retrieving revision 1.51
diff -c -3 -p -r1.51 alpha.h
*** alpha.h 1998/11/13 22:27:42 1.51
--- alpha.h 1998/11/25 06:41:53
*************** extern void alpha_init_expanders ();
*** 1316,1326 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 1316,1326 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/arc/arc.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/arc/arc.h,v
retrieving revision 1.9
diff -c -3 -p -r1.9 arc.h
*** arc.h 1998/08/23 10:43:52 1.9
--- arc.h 1998/11/25 06:41:56
*************** do { \
*** 927,934 ****
#define MAX_REGS_PER_ADDRESS 1
/* We have pre inc/dec (load/store with update). */
! #define HAVE_PRE_INCREMENT
! #define HAVE_PRE_DECREMENT
/* Recognize any constant value that is a valid address. */
#define CONSTANT_ADDRESS_P(X) \
--- 927,934 ----
#define MAX_REGS_PER_ADDRESS 1
/* We have pre inc/dec (load/store with update). */
! #define HAVE_PRE_INCREMENT 1
! #define HAVE_PRE_DECREMENT 1
/* Recognize any constant value that is a valid address. */
#define CONSTANT_ADDRESS_P(X) \
Index: config/c4x/c4x.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/c4x/c4x.h,v
retrieving revision 1.3
diff -c -3 -p -r1.3 c4x.h
*** c4x.h 1998/10/14 22:46:02 1.3
--- c4x.h 1998/11/25 06:41:59
*************** extern struct rtx_def *c4x_gen_compare_r
*** 1519,1532 ****
/* Addressing Modes */
! #define HAVE_POST_INCREMENT
! #define HAVE_PRE_INCREMENT
! #define HAVE_POST_DECREMENT
! #define HAVE_PRE_DECREMENT
! #define HAVE_PRE_MODIFY_REG
! #define HAVE_POST_MODIFY_REG
! #define HAVE_PRE_MODIFY_DISP
! #define HAVE_POST_MODIFY_DISP
/* What about LABEL_REF? */
#define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == SYMBOL_REF)
--- 1519,1532 ----
/* Addressing Modes */
! #define HAVE_POST_INCREMENT 1
! #define HAVE_PRE_INCREMENT 1
! #define HAVE_POST_DECREMENT 1
! #define HAVE_PRE_DECREMENT 1
! #define HAVE_PRE_MODIFY_REG 1
! #define HAVE_POST_MODIFY_REG 1
! #define HAVE_PRE_MODIFY_DISP 1
! #define HAVE_POST_MODIFY_DISP 1
/* What about LABEL_REF? */
#define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == SYMBOL_REF)
Index: config/clipper/clipper.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/clipper/clipper.h,v
retrieving revision 1.4
diff -c -3 -p -r1.4 clipper.h
*** clipper.h 1998/09/08 22:47:58 1.4
--- clipper.h 1998/11/25 06:42:01
*************** do \
*** 639,647 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 639,647 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/convex/convex.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/convex/convex.h,v
retrieving revision 1.4
diff -c -3 -p -r1.4 convex.h
*** convex.h 1998/04/01 05:19:38 1.4
--- convex.h 1998/11/25 06:42:05
*************** enum reg_class {
*** 892,902 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 892,902 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/dsp16xx/dsp16xx.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/dsp16xx/dsp16xx.h,v
retrieving revision 1.9
diff -c -3 -p -r1.9 dsp16xx.h
*** dsp16xx.h 1998/07/07 23:33:15 1.9
--- dsp16xx.h 1998/11/25 06:42:07
*************** extern struct dsp16xx_frame_info current
*** 1299,1309 ****
/* ADDRESSING MODES */
/* The 1610 has post-increment and decrement, but no pre-modify */
! #define HAVE_POST_INCREMENT
! #define HAVE_POST_DECREMENT
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Recognize any constant value that is a valid address. */
#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
--- 1299,1309 ----
/* ADDRESSING MODES */
/* The 1610 has post-increment and decrement, but no pre-modify */
! #define HAVE_POST_INCREMENT 1
! #define HAVE_POST_DECREMENT 1
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Recognize any constant value that is a valid address. */
#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
Index: config/elxsi/elxsi.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/elxsi/elxsi.h,v
retrieving revision 1.3
diff -c -3 -p -r1.3 elxsi.h
*** elxsi.h 1998/03/06 14:44:37 1.3
--- elxsi.h 1998/11/25 06:42:09
*************** enum reg_class { NO_REGS, GENERAL_REGS,
*** 499,509 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 499,509 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/fx80/fx80.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/fx80/fx80.h,v
retrieving revision 1.3
diff -c -3 -p -r1.3 fx80.h
*** fx80.h 1998/03/06 14:44:38 1.3
--- fx80.h 1998/11/25 06:42:11
*************** extern enum reg_class regno_reg_class[];
*** 607,617 ****
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT
! /* #define HAVE_POST_DECREMENT */
! #define HAVE_PRE_DECREMENT
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 607,617 ----
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT 1
! /* #define HAVE_POST_DECREMENT 0 */
! #define HAVE_PRE_DECREMENT 1
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/gmicro/gmicro.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/gmicro/gmicro.h,v
retrieving revision 1.4
diff -c -3 -p -r1.4 gmicro.h
*** gmicro.h 1998/10/16 00:08:45 1.4
--- gmicro.h 1998/11/25 06:42:14
*************** extern enum reg_class regno_reg_class[];
*** 863,873 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 863,873 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/h8300/h8300.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/h8300/h8300.h,v
retrieving revision 1.9
diff -c -3 -p -r1.9 h8300.h
*** h8300.h 1998/09/02 10:13:21 1.9
--- h8300.h 1998/11/25 06:42:17
*************** struct rtx_def *function_arg();
*** 721,731 ****
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT
! /*#define HAVE_POST_DECREMENT */
! #define HAVE_PRE_DECREMENT
! /*#define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 721,731 ----
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT 1
! /*#define HAVE_POST_DECREMENT 0 */
! #define HAVE_PRE_DECREMENT 1
! /*#define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/i370/i370.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/i370/i370.h,v
retrieving revision 1.5
diff -c -3 -p -r1.5 i370.h
*** i370.h 1998/04/08 11:55:10 1.5
--- i370.h 1998/11/25 06:42:18
*************** enum reg_class
*** 612,622 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* These assume that REGNO is a hard or pseudo reg number. They give
nonzero only if REGNO is a hard reg of the suitable class or a pseudo
--- 612,622 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* These assume that REGNO is a hard or pseudo reg number. They give
nonzero only if REGNO is a hard reg of the suitable class or a pseudo
Index: config/i386/i386.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/i386/i386.h,v
retrieving revision 1.43
diff -c -3 -p -r1.43 i386.h
*** i386.h 1998/11/19 19:27:26 1.43
--- i386.h 1998/11/25 06:42:25
*************** do { \
*** 1606,1616 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 1606,1616 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/i860/i860.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/i860/i860.h,v
retrieving revision 1.5
diff -c -3 -p -r1.5 i860.h
*** i860.h 1998/05/06 21:07:44 1.5
--- i860.h 1998/11/25 06:42:26
*************** struct cumulative_args { int ints, float
*** 656,666 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 656,666 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/i960/i960.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/i960/i960.h,v
retrieving revision 1.16
diff -c -3 -p -r1.16 i960.h
*** i960.h 1998/09/15 16:32:49 1.16
--- i960.h 1998/11/25 06:42:29
*************** extern struct rtx_def *i960_function_arg
*** 924,934 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 924,934 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/m32r/m32r.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/m32r/m32r.h,v
retrieving revision 1.19
diff -c -3 -p -r1.19 m32r.h
*** m32r.h 1998/10/28 22:31:05 1.19
--- m32r.h 1998/11/25 06:42:32
*************** do { \
*** 1126,1134 ****
/* We have post-inc load and pre-dec,pre-inc store,
but only for 4 byte vals. */
#if 0
! #define HAVE_PRE_DECREMENT
! #define HAVE_PRE_INCREMENT
! #define HAVE_POST_INCREMENT
#endif
/* Recognize any constant value that is a valid address. */
--- 1126,1134 ----
/* We have post-inc load and pre-dec,pre-inc store,
but only for 4 byte vals. */
#if 0
! #define HAVE_PRE_DECREMENT 1
! #define HAVE_PRE_INCREMENT 1
! #define HAVE_POST_INCREMENT 1
#endif
/* Recognize any constant value that is a valid address. */
Index: config/m68k/m68k.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/m68k/m68k.h,v
retrieving revision 1.26
diff -c -3 -p -r1.26 m68k.h
*** m68k.h 1998/10/29 23:57:11 1.26
--- m68k.h 1998/11/25 06:42:36
*************** __transfer_from_trampoline () \
*** 1281,1291 ****
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT
! /* #define HAVE_POST_DECREMENT */
! #define HAVE_PRE_DECREMENT
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 1281,1291 ----
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT 1
! /* #define HAVE_POST_DECREMENT 0 */
! #define HAVE_PRE_DECREMENT 1
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/m88k/m88k.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/m88k/m88k.h,v
retrieving revision 1.10
diff -c -3 -p -r1.10 m88k.h
*** m88k.h 1998/10/16 00:08:50 1.10
--- m88k.h 1998/11/25 06:42:42
*************** enum reg_class { NO_REGS, AP_REG, XRF_RE
*** 1259,1269 ****
#define SELECT_CC_MODE(OP,X,Y) CCmode
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Recognize any constant value that is a valid address.
When PIC, we do not accept an address that would require a scratch reg
--- 1259,1269 ----
#define SELECT_CC_MODE(OP,X,Y) CCmode
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Recognize any constant value that is a valid address.
When PIC, we do not accept an address that would require a scratch reg
Index: config/mips/mips.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/mips/mips.c,v
retrieving revision 1.44
diff -c -3 -p -r1.44 mips.c
*** mips.c 1998/11/23 14:43:38 1.44
--- mips.c 1998/11/25 06:42:51
*************** char mips_reg_names[][8] =
*** 312,317 ****
--- 312,320 ----
"$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
"hi", "lo", "accum","$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
"$fcc5","$fcc6","$fcc7","$rap"
+ /* start-sanitize-r5900 */
+ , "hi1", "lo1", "accum1"
+ /* end-sanitize-r5900 */
};
/* Mips software names for the registers, used to overwrite the
*************** char mips_sw_reg_names[][8] =
*** 329,334 ****
--- 332,340 ----
"$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
"hi", "lo", "accum","$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
"$fcc5","$fcc6","$fcc7","$rap"
+ /* start-sanitize-r5900 */
+ , "hi1", "lo1", "accum1"
+ /* end-sanitize-r5900 */
};
/* Map hard register number to register class */
*************** enum reg_class mips_regno_to_class[] =
*** 353,358 ****
--- 359,367 ----
HI_REG, LO_REG, HILO_REG, ST_REGS,
ST_REGS, ST_REGS, ST_REGS, ST_REGS,
ST_REGS, ST_REGS, ST_REGS, GR_REGS
+ /* start-sanitize-r5900 */
+ , HI1_REG, LO1_REG, HILO1_REG
+ /* end-sanitize-r5900 */
};
/* Map register constraint character to register class. */
*************** mips_fill_delay_slot (ret, type, operand
*** 1409,1414 ****
--- 1418,1428 ----
else if (type == DELAY_HILO)
num_nops = 2;
+ /* start-sanitize-r5900 */
+ else if (type == DELAY_HILO1)
+ num_nops = 2;
+ /* end-sanitize-r5900 */
+
else
num_nops = 0;
*************** mips_fill_delay_slot (ret, type, operand
*** 1456,1461 ****
--- 1470,1482 ----
mips_load_reg3 = gen_rtx (REG, SImode, MD_REG_FIRST);
mips_load_reg4 = gen_rtx (REG, SImode, MD_REG_FIRST+1);
}
+ /* start-sanitize-r5900 */
+ else if (type == DELAY_HILO1)
+ {
+ mips_load_reg3 = gen_rtx (REG, SImode, MD1_REG_FIRST);
+ mips_load_reg4 = gen_rtx (REG, SImode, MD1_REG_FIRST+1);
+ }
+ /* end-sanitize-r5900 */
else
{
mips_load_reg3 = 0;
*************** mips_move_1word (operands, insn, unsigne
*** 1683,1688 ****
--- 1704,1720 ----
ret = "mflo\t%0";
}
+ /* start-sanitize-r5900 */
+ else if (MD1_REG_P (regno1))
+ {
+ delay = DELAY_HILO1;
+ if (regno1 != HILO1_REGNUM)
+ ret = "mf%1%H1\t%0";
+ else
+ ret = "mflo%H1\t%0";
+ }
+ /* end-sanitize-r5900 */
+
else if (ST_REG_P (regno1) && mips_isa >= 4)
ret = "li\t%0,1\n\tmovf\t%0,%.,%1";
*************** mips_move_1word (operands, insn, unsigne
*** 1719,1724 ****
--- 1751,1768 ----
}
}
+ /* start-sanitize-r5900 */
+ else if (MD1_REG_P (regno0))
+ {
+ if (GP_REG_P (regno1))
+ {
+ delay = DELAY_HILO1;
+ if (regno0 != HILO1_REGNUM && ! TARGET_MIPS16)
+ ret = "mt%0%H0\t%1";
+ }
+ }
+ /* end-sanitize-r5900 */
+
else if (regno0 == FPSW_REGNUM && mips_isa < 4)
{
if (GP_REG_P (regno1))
*************** mips_move_1word (operands, insn, unsigne
*** 1804,1809 ****
--- 1848,1861 ----
delay = DELAY_HILO;
ret = "mt%0\t%.";
}
+
+ /* start-sanitize-r5900 */
+ else if (MD1_REG_P (regno0))
+ {
+ delay = DELAY_HILO1;
+ ret = "mt%0%H0\t%.";
+ }
+ /* end-sanitize-r5900 */
}
else if (GP_REG_P (regno0))
*************** mips_move_2words (operands, insn)
*** 2132,2137 ****
--- 2184,2205 ----
ret = "mthi\t%M1\n\tmtlo\t%L1";
}
+ /* start-sanitize-r5900 */
+ else if (MD1_REG_P (regno0) && GP_REG_P (regno1) && !TARGET_MIPS16)
+ {
+ delay = DELAY_HILO1;
+ if (TARGET_64BIT)
+ {
+ if (regno0 != HILO1_REGNUM)
+ ret = "mt%0%H0\t%1";
+ else if (regno1 == 0)
+ ret = "mtlo%H0\t%.\n\tmthi%H0\t%.";
+ }
+ else
+ ret = "mthi%H0\t%M1\n\tmtlo%H0\t%L1";
+ }
+ /* end-sanitize-r5900 */
+
else if (GP_REG_P (regno0) && MD_REG_P (regno1))
{
delay = DELAY_HILO;
*************** mips_move_2words (operands, insn)
*** 2144,2149 ****
--- 2212,2231 ----
ret = "mfhi\t%M0\n\tmflo\t%L0";
}
+ /* start-sanitize-r5900 */
+ else if (GP_REG_P (regno0) && MD1_REG_P (regno1))
+ {
+ delay = DELAY_HILO1;
+ if (TARGET_64BIT)
+ {
+ if (regno1 != HILO1_REGNUM)
+ ret = "mf%H1%1\t%0";
+ }
+ else
+ ret = "mfhi%H1\t%M0\n\tmflo%H1\t%L0";
+ }
+ /* end-sanitize-r5900 */
+
else if (TARGET_64BIT)
ret = "move\t%0,%1";
*************** mips_move_2words (operands, insn)
*** 2237,2242 ****
--- 2319,2333 ----
? "mtlo\t%.\n\tmthi\t%."
: "mt%0\t%.\n");
}
+ /* start-sanitize-r5900 */
+ else if (MD1_REG_P (regno0))
+ {
+ delay = DELAY_HILO1;
+ ret = (regno0 == HILO1_REGNUM
+ ? "mtlo%H0\t%.\n\tmthi%H0\t%."
+ : "mt%0%H0\t%.\n");
+ }
+ /* end-sanitize-r5900 */
}
else if (code1 == CONST_INT && GET_MODE (op0) == DImode
*************** override_options ()
*** 4395,4400 ****
--- 4486,4497 ----
mips_char_to_class['l'] = LO_REG;
mips_char_to_class['a'] = HILO_REG;
mips_char_to_class['x'] = MD_REGS;
+ /* start-sanitize-r5900 */
+ mips_char_to_class['u'] = HI1_REG;
+ mips_char_to_class['q'] = LO1_REG;
+ mips_char_to_class['t'] = HILO1_REG;
+ mips_char_to_class['u'] = MD1_REGS;
+ /* end-sanitize-r5900 */
mips_char_to_class['b'] = ALL_REGS;
mips_char_to_class['y'] = GR_REGS;
mips_char_to_class['z'] = ST_REGS;
*************** override_options ()
*** 4456,4461 ****
--- 4553,4566 ----
|| (regno == MD_REG_FIRST
&& size == 2 * UNITS_PER_WORD)));
+ /* start-sanitize-r5900 */
+ else if (MD1_REG_P (regno))
+ temp = (class == MODE_INT
+ && (size <= UNITS_PER_WORD
+ || (regno == MD1_REG_FIRST
+ && size == 2 * UNITS_PER_WORD)));
+ /* end-sanitize-r5900 */
+
else
temp = 0;
*************** print_operand (file, op, letter)
*** 4740,4745 ****
--- 4845,4861 ----
default:
abort_with_insn (op, "PRINT_OPERAND, invalid insn for %%C");
}
+ /* start-sanitize-r5900 */
+ else if (letter == 'H')
+ {
+ if (true_regnum (op) >= MD_REG_FIRST
+ && true_regnum (op) <= MD_REG_LAST)
+ ;
+ else if (true_regnum (op) >= MD1_REG_FIRST
+ && true_regnum (op) <= MD1_REG_LAST)
+ fputs ("1", file);
+ }
+ /* end-sanitize-r5900 */
else if (letter == 'N')
switch (code)
*************** mips_secondary_reload_class (class, mode
*** 7101,7111 ****
--- 7217,7241 ----
&& gp_reg_p
&& GET_MODE_SIZE (mode) <= GET_MODE_SIZE (SImode))
? NO_REGS : gr_regs);
+ /* start-sanitize-r5900 */
+ else if (class == HILO1_REG && regno != GP_REG_FIRST + 0)
+ return ((! in_p
+ && gp_reg_p
+ && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (SImode))
+ ? NO_REGS : gr_regs);
+ /* end-sanitize-r5900 */
else if (regno == HILO_REGNUM)
return ((in_p
&& class == gr_regs
&& GET_MODE_SIZE (mode) <= GET_MODE_SIZE (SImode))
? NO_REGS : gr_regs);
+ /* start-sanitize-r5900 */
+ else if (regno == HILO1_REGNUM)
+ return ((in_p
+ && class == gr_regs
+ && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (SImode))
+ ? NO_REGS : gr_regs);
+ /* end-sanitize-r5900 */
/* Copying from HI or LO to anywhere other than a general register
requires a general register. */
*************** mips_secondary_reload_class (class, mode
*** 7118,7123 ****
--- 7248,7264 ----
}
return gp_reg_p ? NO_REGS : gr_regs;
}
+ /* start-sanitize-r5900 */
+ else if (class == HI1_REG || class == LO1_REG || class == MD1_REGS)
+ {
+ if (TARGET_MIPS16 && in_p)
+ {
+ /* We can't really copy to HI or LO at all in mips16 mode. */
+ return M16_REGS;
+ }
+ return gp_reg_p ? NO_REGS : gr_regs;
+ }
+ /* end-sanitize-r5900 */
if (MD_REG_P (regno))
{
if (TARGET_MIPS16 && ! in_p)
*************** mips_secondary_reload_class (class, mode
*** 7127,7132 ****
--- 7268,7284 ----
}
return class == gr_regs ? NO_REGS : gr_regs;
}
+ /* start-sanitize-r5900 */
+ else if (MD1_REG_P (regno))
+ {
+ if (TARGET_MIPS16 && ! in_p)
+ {
+ /* We can't really copy to HI or LO at all in mips16 mode. */
+ return M16_REGS;
+ }
+ return class == gr_regs ? NO_REGS : gr_regs;
+ }
+ /* end-sanitize-r5900 */
/* We can only copy a value to a condition code register from a
floating point register, and even then we require a scratch
Index: config/mips/mips.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/mips/mips.h,v
retrieving revision 1.38
diff -c -3 -p -r1.38 mips.h
*** mips.h 1998/11/23 14:43:40 1.38
--- mips.h 1998/11/25 06:43:00
*************** typedef struct mips_args {
*** 2634,2644 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* These assume that REGNO is a hard or pseudo reg number.
They give nonzero only if REGNO is a hard reg of the suitable class
--- 2726,2736 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* These assume that REGNO is a hard or pseudo reg number.
They give nonzero only if REGNO is a hard reg of the suitable class
Index: config/ns32k/ns32k.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/ns32k/ns32k.h,v
retrieving revision 1.4
diff -c -3 -p -r1.4 ns32k.h
*** ns32k.h 1998/03/06 14:45:13 1.4
--- ns32k.h 1998/11/25 06:43:04
*************** __transfer_from_trampoline () \
*** 808,818 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 808,818 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/pa/pa.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/pa/pa.h,v
retrieving revision 1.28
diff -c -3 -p -r1.28 pa.h
*** pa.h 1998/11/03 19:56:12 1.28
--- pa.h 1998/11/25 06:43:08
*************** extern struct rtx_def *hppa_builtin_save
*** 1368,1378 ****
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT
! #define HAVE_POST_DECREMENT
! #define HAVE_PRE_DECREMENT
! #define HAVE_PRE_INCREMENT
/* Macros to check register numbers against specific register classes. */
--- 1368,1378 ----
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT 1
! #define HAVE_POST_DECREMENT 1
! #define HAVE_PRE_DECREMENT 1
! #define HAVE_PRE_INCREMENT 1
/* Macros to check register numbers against specific register classes. */
Index: config/pdp11/pdp11.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/pdp11/pdp11.h,v
retrieving revision 1.5
diff -c -3 -p -r1.5 pdp11.h
*** pdp11.h 1998/05/06 21:07:56 1.5
--- pdp11.h 1998/11/25 06:43:10
*************** extern int current_function_pretend_args
*** 687,697 ****
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT
! /* #define HAVE_POST_DECREMENT */
! #define HAVE_PRE_DECREMENT
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 687,697 ----
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT 1
! /* #define HAVE_POST_DECREMENT 0 */
! #define HAVE_PRE_DECREMENT 1
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/pyr/pyr.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/pyr/pyr.h,v
retrieving revision 1.4
diff -c -3 -p -r1.4 pyr.h
*** pyr.h 1998/04/01 05:20:06 1.4
--- pyr.h 1998/11/25 06:43:14
*************** extern int current_function_calls_alloca
*** 803,813 ****
/*** Addressing modes, and classification of registers for them. ***/
! /* #define HAVE_POST_INCREMENT */ /* pyramid has none of these */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 803,813 ----
/*** Addressing modes, and classification of registers for them. ***/
! /* #define HAVE_POST_INCREMENT 0 */ /* pyramid has none of these */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/romp/romp.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/romp/romp.h,v
retrieving revision 1.4
diff -c -3 -p -r1.4 romp.h
*** romp.h 1998/11/05 23:21:32 1.4
--- romp.h 1998/11/25 06:43:17
*************** struct rt_cargs {int gregs, fregs; };
*** 905,915 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 905,915 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/rs6000/rs6000.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/rs6000/rs6000.h,v
retrieving revision 1.31
diff -c -3 -p -r1.31 rs6000.h
*** rs6000.h 1998/11/10 14:06:42 1.31
--- rs6000.h 1998/11/25 06:43:24
*************** typedef struct rs6000_args
*** 1755,1765 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! #define HAVE_PRE_DECREMENT
! #define HAVE_PRE_INCREMENT
/* Macros to check register numbers against specific register classes. */
--- 1755,1765 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! #define HAVE_PRE_DECREMENT 1
! #define HAVE_PRE_INCREMENT 1
/* Macros to check register numbers against specific register classes. */
Index: config/sparc/sparc.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/sparc/sparc.h,v
retrieving revision 1.50
diff -c -3 -p -r1.50 sparc.h
*** sparc.h 1998/10/28 18:00:53 1.50
--- sparc.h 1998/11/25 06:43:29
*************** extern struct rtx_def *sparc_builtin_sav
*** 2271,2281 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 2271,2281 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/spur/spur.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/spur/spur.h,v
retrieving revision 1.3
diff -c -3 -p -r1.3 spur.h
*** spur.h 1998/03/06 14:45:25 1.3
--- spur.h 1998/11/25 06:43:30
*************** extern int current_function_pretend_args
*** 586,596 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 586,596 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/vax/vax.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/vax/vax.h,v
retrieving revision 1.6
diff -c -3 -p -r1.6 vax.h
*** vax.h 1998/05/13 14:04:15 1.6
--- vax.h 1998/11/25 06:43:32
*************** gen_rtx (PLUS, Pmode, frame, GEN_INT (12
*** 579,589 ****
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT
! /* #define HAVE_POST_DECREMENT */
! #define HAVE_PRE_DECREMENT
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 579,589 ----
/* Addressing modes, and classification of registers for them. */
! #define HAVE_POST_INCREMENT 1
! /* #define HAVE_POST_DECREMENT 0 */
! #define HAVE_PRE_DECREMENT 1
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
Index: config/we32k/we32k.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/./gcc/config/we32k/we32k.h,v
retrieving revision 1.4
diff -c -3 -p -r1.4 we32k.h
*** we32k.h 1998/04/01 05:20:24 1.4
--- we32k.h 1998/11/25 06:43:35
*************** enum reg_class { NO_REGS, GENERAL_REGS,
*** 509,519 ****
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT */
! /* #define HAVE_POST_DECREMENT */
! /* #define HAVE_PRE_DECREMENT */
! /* #define HAVE_PRE_INCREMENT */
/* Macros to check register numbers against specific register classes. */
--- 509,519 ----
/* Addressing modes, and classification of registers for them. */
! /* #define HAVE_POST_INCREMENT 0 */
! /* #define HAVE_POST_DECREMENT 0 */
! /* #define HAVE_PRE_DECREMENT 0 */
! /* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */