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Re: This code runs *very* slowly
- To: Rahul Siddharthan <rsidd at physics dot iisc dot ernet dot in>, egcs-bugs at cygnus dot com, egcs-patches at cygnus dot com
- Subject: Re: This code runs *very* slowly
- From: Richard Henderson <rth at cygnus dot com>
- Date: Thu, 5 Nov 1998 04:06:21 -0800
- References: <Pine.LNX.4.05.9810281340200.24889-100000@sys3.physics.iisc.ernet.in>
- Reply-To: Richard Henderson <rth at cygnus dot com>
Oops. Try this patch instead. Have to be more careful about
when new temporaries are or are not created.
r~
Index: config/alpha/alpha.md
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/alpha/alpha.md,v
retrieving revision 1.55
retrieving revision 1.57
diff -c -p -d -r1.55 -r1.57
*** alpha.md 1998/09/19 12:14:35 1.55
--- alpha.md 1998/11/05 04:04:04 1.57
***************
*** 426,435 ****
(match_operand:SI 2 "add_operand" "")))]
""
"
! { emit_insn (gen_rtx_SET (VOIDmode, gen_lowpart (DImode, operands[0]),
! gen_rtx_PLUS (DImode,
! gen_lowpart (DImode, operands[1]),
! gen_lowpart (DImode, operands[2]))));
DONE;
} ")
--- 426,443 ----
(match_operand:SI 2 "add_operand" "")))]
""
"
! {
! rtx op1 = gen_lowpart (DImode, operands[1]);
! rtx op2 = gen_lowpart (DImode, operands[2]);
!
! if (! cse_not_expected)
! {
! rtx tmp = gen_reg_rtx (DImode);
! emit_insn (gen_adddi3 (tmp, op1, op2));
! emit_move_insn (operands[0], gen_lowpart (SImode, tmp));
! }
! else
! emit_insn (gen_adddi3 (gen_lowpart (DImode, operands[0]), op1, op2));
DONE;
} ")
***************
*** 712,721 ****
(match_operand:SI 2 "reg_or_8bit_operand" "")))]
""
"
! { emit_insn (gen_rtx_SET (VOIDmode, gen_lowpart (DImode, operands[0]),
! gen_rtx_MINUS (DImode,
! gen_lowpart (DImode, operands[1]),
! gen_lowpart (DImode, operands[2]))));
DONE;
} ")
--- 720,737 ----
(match_operand:SI 2 "reg_or_8bit_operand" "")))]
""
"
! {
! rtx op1 = gen_lowpart (DImode, operands[1]);
! rtx op2 = gen_lowpart (DImode, operands[2]);
!
! if (! cse_not_expected)
! {
! rtx tmp = gen_reg_rtx (DImode);
! emit_insn (gen_subdi3 (tmp, op1, op2));
! emit_move_insn (operands[0], gen_lowpart (SImode, tmp));
! }
! else
! emit_insn (gen_subdi3 (gen_lowpart (DImode, operands[0]), op1, op2));
DONE;
} ")