This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

Re: PPro conditional move problem


> 
> > It is kind of braindead. Anyway, I think we can change all non-FP CC
> > setting insns to
> > 
> > [(parallel [(set (cc0)
> > 		 ..............
> > 	    (clobber (match_scratch:HI 1 ""))])]
> > 
> > 
> > [(set (cc0)
> >       ......
> >  (clobber (match_scratch:HI 3 "=a"))]
> 
> Isn't this going to impact code generation by requiring a scratch
> register for all non-FP CC insns?  What about the comparisons which
> will not become part of a conditional move?

The scratch register is used only if the next CC user is a FP
conditional move.

> 
> Actually, as a side note I would like to see some FP CC insns which
> don't require a scratch register.  I believe that this can be done
> in the case of TARGET_CMOVE && !TARGET_IEEE.

I don't think the scratch register will be generated in this case.

> 
> > Is this reasonable? If yes, I will try to implement it this weekend.
> 
> Is sounds possible.  However the conditional move patterns are an
> optimization, if the overhead of using them becomes too high then
> it's not worth using them.  You want to make sure that code not
> involving a conditional move isn't impacted by your changes.
> 

I don't think it is easy to do if you mean the pattern won't require
a scratch register. But we don't have to use it if the next CC user
is not a FP conditional move. The only drawback is the compiler has
to find a scatch register for a test insn, which may or may not be
used.

-- 
H.J. Lu (hjl@gnu.org)


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]