This is the mail archive of the
gcc-help@gcc.gnu.org
mailing list for the GCC project.
Re: gcc for microcontroller
- From: Andrew Haley <aph at redhat dot com>
- To: Claudio Eterno <eterno dot claudio at gmail dot com>, gcc-help at gcc dot gnu dot org
- Date: Sun, 15 Oct 2017 09:12:25 +0100
- Subject: Re: gcc for microcontroller
- Authentication-results: sourceware.org; auth=none
- Authentication-results: ext-mx07.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com
- Authentication-results: ext-mx07.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=aph at redhat dot com
- Dmarc-filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 3289BC04AC47
- References: <CA+moFQ8eONaOcN67cVw3UaSYy0=WARQwrozVYwd+FBUXwDZzBQ@mail.gmail.com>
On 14/10/17 11:42, Claudio Eterno wrote:
> I've some doubts on this:
>
> "stack-based architectures are difficult to accommodate as well"
>
> Can someone explain better this?
> If I remember well the C uses the stack for local variable storage,
> does he refer to those architectures which are completely stack
> oriented (GPR not present)?
This isn't about stack frames. This is about machines such as the
Burroughs B-5500 and its descendants (e.g. Novix) which use
zero-operand instructions. These take operands from the stack and
return the results there. GCC assumes that instructions use registers
for source and destination operands. (Usually, anyway.) It would be
possible to write a pass which turned register-register operations
into stack code, but maybe the code quality wouldn't be great.
--
Andrew Haley
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
EAC8 43EB D3EF DB98 CC77 2FAD A5CD 6035 332F A671