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Re: __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 not defined on aarch64

From: Toebs Douglass <toby at winterflaw dot net>
To: "gcc-help at gcc dot gnu dot org" <gcc-help at gcc dot gnu dot org>
Date: Tue, 27 Jun 2017 23:58:47 +0200
Subject: Re: __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 not defined on aarch64
Authentication-results: sourceware.org; auth=none
References: <4c0415ed-12a1-b736-0d33-86e38439e952@winterflaw.net> <ec757af1-53d6-a203-3758-d984aef0e857@foss.arm.com>

On 27/06/17 23:53, Richard Earnshaw wrote:
> This is correct.  AArch64 cannot do the 16-byte atomic compare and swap
> and needs lock operations.

I may be completely wrong, but I think it can.

ARM (32-bit) supported double-word LL/SC from arm6k and armv8 I think
had it from day one.  CAS is mapped onto LL/SC.

I've written asm to do this, the key is the ldxp and stxp instruction,
and it seems to work.

Follow-Ups:
- Re: __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 not defined on aarch64
  - From: Richard Earnshaw

References:
- __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 not defined on aarch64
  - From: Toebs Douglass
- Re: __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 not defined on aarch64
  - From: Richard Earnshaw

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