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Re: Bitfield insert and extract instructions are not generated
- From: Mahesh Bodapati <maheshbodapati90 at gmail dot com>
- To: gcc-help at gcc dot gnu dot org
- Date: Wed, 31 May 2017 12:06:58 +0530
- Subject: Re: Bitfield insert and extract instructions are not generated
- Authentication-results: sourceware.org; auth=none
- References: <CAKd0kDLY9mWS+5tJ8V2MwxH+OBmbxE1r9kn7n8oBjb1KBTZd0g@mail.gmail.com>
can someone help me in generating bitfield insert and extract instructions?
On Wed, May 31, 2017 at 12:22 AM, Mahesh Bodapati
<maheshbodapati90@gmail.com> wrote:
> Hi,
>
>
>
> I have added bitfield insert and bitfield extract instructions for
> risc target like below..
>
>
>
> (define_expand "insv"
>
> [(set (zero_extract:SI (match_operand 0 "register_operand" "+r")
>
> (match_operand 1 "const_int_M_operand" "S")
>
> (match_operand 2 "const_int_M_operand" "S"))
>
> (match_operand 3 "register_operand" "r"))]
>
> "TARGET_HAS_BITFIELD"
>
>
>
>
>
>
>
> (define_insn "insv_32"
>
> [(set (zero_extract (match_operand 0 "register_operand" "+r")
>
> (match_operand 1 "const_int_M_operand" "S")
>
> (match_operand 2 "const_int_M_operand" "S"))
>
> (match_operand 3 "register_operand" "r"))]
>
> "TARGET_HAS_BITFIELD && UINTVAL (operands[1]) > 0
>
> && UINTVAL (operands[1]) + UINTVAL (operands[2]) <= 32"
>
> "bsi %0, %3, %1, %2"
>
>
>
>
>
> (define_constraint "S"
>
> "A constant in the range 0 to 31 (inclusive)."
>
> (and (match_code "const_int")
>
> (match_test "ival > 0 && ival < 0x20")))
>
>
>
> but I didn't see the bitfield insert instruction when I compiled a c
> code which has structure bitfield assignments. I have seen a
> combination of ori and andi instructions where as in ARM,I have seen
> the bitfield insert instruction.
>
>
>
>
>
> any suggestions?
>
>
>
>
>
> Thanks,
>
> Mahesh