Re: [aarch64] union{float16_t;uint16}

[Mason <slash dot tmp at free dot fr>]

On 16/01/2017 10:29, Mason wrote:

> On 14/01/2017 02:22, Leo wrote:
> 
>> #include "arm_neon.h"
>> #include <stdio.h>
>>
>> typedef union {
>>        float16_t m1;
>>        unsigned short m2;
>> } MYUNION;
>>
>> int main(void)
>> {
>>        MYUNION U1;
>>        U1.m1 = 5;
>>        printf("m2 = 0x%x \n",U1.m2);
>>        return 0;
>> }
> 
> What representation for (float16_t)5 were you expecting?
> 
> Giving the code a spin...
> 
> $ arm-linux-gnueabihf-gcc foo.c 
> In file included from foo.c:1:0:
> /tmp/gcc-linaro-5.3-2016.02/lib/gcc/arm-linux-gnueabihf/5.3.1/include/arm_neon.h:31:2:
> 	error: #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h
>  #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h
>   ^
> foo.c:5:8: error: unknown type name 'float16_t'
>         float16_t m1;
>         ^
> 
> $ arm-linux-gnueabihf-gcc -mfloat-abi=softfp -mfpu=neon foo.c 
> In file included from /tmp/gcc-linaro-5.3-2016.02/arm-linux-gnueabihf/libc/usr/include/features.h:389:0,
>                  from /tmp/gcc-linaro-5.3-2016.02/arm-linux-gnueabihf/libc/usr/include/stdint.h:25,
>                  from /tmp/gcc-linaro-5.3-2016.02/lib/gcc/arm-linux-gnueabihf/5.3.1/include/stdint.h:9,
>                  from /tmp/gcc-linaro-5.3-2016.02/lib/gcc/arm-linux-gnueabihf/5.3.1/include/arm_neon.h:38,
>                  from foo.c:1:
> /tmp/gcc-linaro-5.3-2016.02/arm-linux-gnueabihf/libc/usr/include/gnu/stubs.h:7:29:
> 	fatal error: gnu/stubs-soft.h: No such file or directory
> compilation terminated.
> 
> Hmmm, looks like my toolchain doesn't support float16_t
> 
> 
> https://gcc.gnu.org/onlinedocs/gcc/Half-Precision.html
> 
> Let's try __fp16
> 
> typedef union {
>        __fp16 m1;
>        unsigned short m2;
> } MYUNION;
> 
> $ arm-linux-gnueabihf-gcc -S -O2 -mfp16-format=alternative foo.c
> 
> main:
> 	movw	r0, #:lower16:.LC0
> 	push	{r3, lr}
> 	mov	r1, #17664
> 	movt	r0, #:upper16:.LC0
> 	bl	printf
> 	movs	r0, #0
> 	pop	{r3, pc}
> 
> NB: I'm targeting armv7-a, while you're targeting armv8-a
> (I missed the [aarch64] tag in the Subject. It's a good idea to repeat
> important information in the body.)

On https://godbolt.org/
Picking ARM64 gcc 5.4 -O2
Your code is translated to

main:
        stp     x29, x30, [sp, -16]!
        adrp    x1, .LC0
        add     x1, x1, :lo12:.LC0
        mov     w2, 17664
        add     x29, sp, 0
        mov     w0, 1
        bl      __printf_chk
        mov     w0, 0
        ldp     x29, x30, [sp], 16
        ret
.LC0:
        .string "m2 = 0x%x \n"

Same 17664 i.e. 0x4500

Regards.