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Re: Bare metal ARM Cross compiler - aeabi auto-generated functions for cortex-m0 use wrong instruction set
- From: Chris Johns <chrisj at rtems dot org>
- To: Jan K <jprofesorek at o2 dot pl>
- Cc: gcc-help at gcc dot gnu dot org
- Date: Mon, 03 Dec 2012 10:59:47 +1100
- Subject: Re: Bare metal ARM Cross compiler - aeabi auto-generated functions for cortex-m0 use wrong instruction set
- References: <firstname.lastname@example.org>
Jan K wrote:
I'm trying to get the cross-toolchain for cortex-m0 working. The target is arm-none-eabi.
The gcc has no problem compiling my code using allowed instructions only. As long as I do not try to use / or % my code runs as expected.
When I try to divide, GCC uses and appends ARM runtime ABI functions (which is correct, since m0 has no hardware division op).
The problem is that included functions (in particular: __aeabi_idiv) use instructions that are _not_ part of the cortex-m0 instructions set (like lsleq, movne, rsbmi).
I compile and link the code with '-mcpu=cortex-m0 -mthumb' flags.
What I want to is to force gcc to include the ARM runtime ABI functions that work with cortex-m0.
How can I get it working? Am I missing something? Is it anyhow possible?
As far as I can tell you are not missing anything. I raised the issue
not long ago ...
Maybe this patch helps. It helped me with gcc 4.7.2 and the Cortex-3M I
was using ...