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Re: Add assembly instruction to GCC
Ok, let me get this straight. I'm not sure how the binary files are
structured. Shouldn't the address of each instruction be in the binary
file?
if I have something like:
>>> 401ba0 : f0 0f lock mov (bad),%db1"
>>> 401ba2 : 23 48 89 and -0x77(%rax),%ecx"
is it the same as:
>>> 401ba0 : f0 0f 23 lock (bad)
>>> 401ba3 : 48 89
aren't those two forms different(they're gonna have different addresses)?
I want GCC to discriminate between these two forms and do it like the
latter (if those two are different in a binary sense).
On Fri, Apr 13, 2012 at 9:24 AM, Amir Ghanbari <a.ghanbari1990@gmail.com> wrote:
> The problem is that the binary being generated is not exactly what I
> want. when I simulate my code, I get an "invalid opcode" error and the
> address of the instruction is exactly where the disassembly get
> screwed up. So I believe that's what's happening. I need to make GCC
> treat that "F0 0F 23" as an instruction and put it in the binary
> intact and don't mix it with other instructions.
> I tried defining a machine instruction in GCC for ia64, but I couldn't
> figure out how to generate the assembly for that instruction.
>
> On Fri, Apr 13, 2012 at 1:15 AM, Ian Lance Taylor <iant@google.com> wrote:
>>
>> Amir Ghanbari <a.ghanbari1990@gmail.com> writes:
>>
>> > I'm trying to expand X86 ISA. So I have added some hardware to X86 (in
>> > Gem5 Simulator) and I have updated X86 decoder to support those
>> > instructions. In order to call those instructions I use GCC inline
>> > assembly ".byte" directive. something like this : ".byte 0xF0, 0x0F,
>> > 0x23;"
>> > The problem is when I compile my code using GCC, it changes the
>> > instructions that i have created. For instance:
>> > I intend to have something generated like this:
>> >
>> > ? ? 48 89 eb ? ? ? ? ? ? ? mov ? ?%rbp,%rbx
>> > ? ? 48 83 e3 fe ? ? ? ? ? and ? ?$0xfffffffffffffffe,%rbx
>> > ? ? 48 8b 7c 24 08 ? ? ?mov ? ?0x8(%rsp),%rdi
>> > ? ? f0 0f 23 ? ? ? ? ? ? ? ?lock (bad)
>> > ? ? 48 89 04 24 ? ? ? ? ?mov ? ?%rax,(%rsp)
>> > ? ? 4c 8b 34 24 ? ? ? ? ?mov ? ?(%rsp),%r14
>> >
>> > but GCC generates something like this:
>> >
>> > ? ? 48 89 eb ? ? ? ? ? ? ? mov ? ?%rbp,%rbx"
>> > ? ? 48 83 e3 fe ? ? ? ? ? and ? ?$0xfffffffffffffffe,%rbx"
>> > ? ? 48 8b 7c 24 08 ? ? ?mov ? ?0x8(%rsp),%rdi"
>> > ? ? f0 0f ? ? ? ? ? ? ? ? ? ? lock mov (bad),%db1"
>> > ? ? 23 48 89 ? ? ? ? ? ? ? and ? ?-0x77(%rax),%ecx"
>> > ? ? 04 24 ? ? ? ? ? ? ? ? ? ?add ? ?$0x24,%al"
>> > ? ? 4c 8b 34 24 ? ? ? ? ? mov ? ?(%rsp),%r14"
>> >
>> > Is there a way to tell GCC that "F0 0F 23" is a unique instruction so
>> > it wouldn't mix it with other instructions?
>>
>> I don't understand what you are asking. ?GCC does not generate any
>> output that looks like the lines quoted above. ?It looks like you are
>> showing us the output of a disassembler, but GCC does not include a
>> disassembler. ?And it looks like the bytes that the disassembler is
>> showing are the bytes that you want, they just aren't being disassembled
>> the way you want them to be. ?It sounds like you need to change your
>> disassembler to support your instruction.
>>
>> Ian