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Information regarding scheduler description
- From: ganesh gopalasubramanian <gganeshgcc at gmail dot com>
- To: gcc-help at gcc dot gnu dot org
- Date: Mon, 2 Jan 2012 12:22:57 +0530
- Subject: Information regarding scheduler description
Hi,
I am trying to describe my processor pipeline.
Consider that I am having 5 instructions (instruction1,
instruction2... instruction5).
For four of those instructions, I have described the instruction
reservations along with the functional units and their alternatives
available for each cycle.
For the fifth instruction, I haven't described the instruction reservation.
What will happen now? Will the instruction be stalling my pipeline.
Consider that five instruction instruction are generated as below.
instruction1,
instruction2,
instruction3,
instruction4,
instruction5
My scheduler description supports the following
1. instruction1 & instruction2 can be issued as a single bundle.
2. instruction3 & instruction4 can be issued as a single bundle.
Now, I don't have description about instruction5, will it stall my
pipeline and get issued as a separation instruction bundle (assuming
issue rate as 1)?
Or should I describe the instruction reservation (for instruction5)
separately along with stall information?
Regards
Ganesh