This is the mail archive of the
gcc-help@gcc.gnu.org
mailing list for the GCC project.
Inline asm - unexpected optimization
- From: Jeremy Hall <gcc dot hall at gmail dot com>
- To: gcc-help at gcc dot gnu dot org
- Date: Wed, 24 Aug 2011 10:09:58 +0100
- Subject: Inline asm - unexpected optimization
Hi,
Looking at the assembler for this speculative code, I saw that without
asm volatile, the second call to rdrand was removed and the value
"low" used twice.
gcc 4.6.1 with any optimization turned on. It looks to me like this
optimization will stop the code working.
My question is: is this my ignorance of inline assembler (most
likely) or is it a bug in gcc which I should report?
I know its a new instruction. The retry loop etc is removed to
simplify the test case.
#include <stdio.h>
typedef unsigned long long qword;
// #define asm __asm__ __volatile__
int
main( int argc, char *argv[] )
{
qword result;
/* for 32 bit mode call rdrand twice */
unsigned int low, high;
asm( "rdrand %0" : "=r" (low) );
asm( "rdrand %0" : "=r" (high) );
result = ((qword)high << 32U) | low;
printf("64 bit random number: %llu\n", result );
}
// with asm volatile
#APP
# 17 "rand.c" 1
rdrand edx # low
# 0 "" 2
# 18 "rand.c" 1
rdrand eax # high
# 0 "" 2
#NO_APP
mov DWORD PTR [esp+4], edx #, low
mov DWORD PTR [esp+8], eax #, high
mov DWORD PTR [esp], OFFSET FLAT:.LC0 #,
call printf #
// without volatile
#APP
# 14 "rand.c" 1
rdrand eax # low
# 0 "" 2
#NO_APP
mov ebp, esp #,
.cfi_def_cfa_register 5
and esp, -16 #,
sub esp, 16 #,
mov DWORD PTR [esp+4], eax #, low
mov DWORD PTR [esp+8], eax #, low
mov DWORD PTR [esp], OFFSET FLAT:.LC0 #,
call printf #